Intel ARCHITECTURE IA-32 User Manual download pdf (Page 41)

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Vol. 3A 1-5

ABOUT THIS MANUAL

1.3.1 Bit and Byte Order

In illustrations of data structures in memory, smaller addresses appear toward the bottom of the

figure; addresses increase toward the top. Bit positions are numbered from right to left. The

numerical value of a set bit is equal to two raised to the power of the bit position. IA-32 proces-

sors are “little endian” machines; this means the bytes of a word are numbered starting from the

least significant byte. Figure 1-1 illustrates these conventions.

1.3.2 Reserved Bits and Software Compatibility

In many register and memory layout descriptions, certain bits are marked as reserved. When

bits are marked as reserved, it is essential for compatibility with future processors that software

treat these bits as having a future, though unknown, effect. The behavior of reserved bits should

be regarded as not only undefined, but unpredictable. Software should follow these guidelines

in dealing with reserved bits:

• Do not depend on the states of any reserved bits when testing the values of registers which

contain such bits. Mask out the reserved bits before testing.

• Do not depend on the states of any reserved bits when storing to memory or to a register.

• Do not depend on the ability to retain information written into any reserved bits.

• When loading a register, always load the reserved bits with the values indicated in the

documentation, if any, or reload them with values previously read from the same register.

NOTE

Avoid any software dependence upon the state of reserved bits in IA-32

registers. Depending upon the values of reserved register bits will make

software dependent upon the unspecified manner in which the processor

handles these bits. Programs that depend upon reserved values risk incompat-

ibility with future processors.

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