Intel ARCHITECTURE IA-32 User Manual Page 232

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5-56 Vol. 3A
INTERRUPT AND EXCEPTION HANDLING
Prior to executing a waiting x87 FPU instruction or the WAIT/FWAIT instruction, the x87 FPU
checks for pending x87 FPU floating-point exceptions (as described in step 2 above). Pending
x87 FPU floating-point exceptions are ignored for “non-waiting” x87 FPU instructions, which
include the FNINIT, FNCLEX, FNSTSW, FNSTSW AX, FNSTCW, FNSTENV, and FNSAVE
instructions. Pending x87 FPU exceptions are also ignored when executing the state manage-
ment instructions FXSAVE and FXRSTOR.
All of the x87 FPU floating-point error conditions can be recovered from. The x87 FPU floating-
point-error exception handler can determine the error condition that caused the exception from
the settings of the flags in the x87 FPU status word. See “Software Exception Handling” in
Chapter 8, “Programming with the x87 FPU,” in the IA-32 Intel® Architecture Software Devel-
opers Manual, Volume 1, for more information on handling x87 FPU floating-point exceptions.
Exception Error Code
None. The x87 FPU provides its own error information.
Saved Instruction Pointer
The saved contents of CS and EIP registers point to the floating-point or WAIT/FWAIT instruc-
tion that was about to be executed when the floating-point-error exception was generated. This
is not the faulting instruction in which the error condition was detected. The address of the
faulting instruction is contained in the x87 FPU instruction pointer register. See “x87 FPU
Instruction and Operand (Data) Pointers” in Chapter 8, “Programming with the x87 FPU,” in the
IA-32 Intel® Architecture Software Developers Manual, Volume 1, for more information about
information the FPU saves for use in handling floating-point-error exceptions.
Program State Change
A program-state change generally accompanies an x87 FPU floating-point exception because
the handling of the exception is delayed until the next waiting x87 FPU floating-point or
WAIT/FWAIT instruction following the faulting instruction. The x87 FPU, however, saves
sufficient information about the error condition to allow recovery from the error and re-execu-
tion of the faulting instruction if needed.
In situations where non- x87 FPU floating-point instructions depend on the results of an x87
FPU floating-point instruction, a WAIT or FWAIT instruction can be inserted in front of a
dependent instruction to force a pending x87 FPU floating-point exception to be handled before
the dependent instruction is executed. See “x87 FPU Exception Synchronization” in Chapter 8,
“Programming with the x87 FPU,” in the IA-32 Intel® Architecture Software Developers
Manual, Volume 1, for more information about synchronization of x87 floating-point-error
exceptions.
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