Intel ARCHITECTURE IA-32 User Manual download pdf (Page 604)

17-12 Vol. 3A

IA-32 ARCHITECTURE COMPATIBILITY

17.17.6.2 NUMERIC OVERFLOW EXCEPTION (#O)

On the 32-bit x87 FPUs, when the numeric overflow exception is masked and the rounding

mode is set to chop (toward 0), the result is the largest positive or smallest negative number. The

16-bit IA-32 math coprocessors do not signal the overflow exception when the masked response

is not ∞; that is, they signal overflow only when the rounding control is not set to round to 0. If

rounding is set to chop (toward 0), the result is positive or negative ∞. Under the most common

rounding modes, this difference has no impact on existing software.

If rounding is toward 0 (chop), a program on a 32-bit x87 FPU produces, under overflow condi-

tions, a result that is different in the least significant bit of the significand, compared to the result

on a 16-bit IA-32 math coprocessor. The reason for this difference is IEEE Standard 754

compatibility.

When the overflow exception is not masked, the precision exception is flagged on the 32-bit x87

FPUs. When the result is stored in the stack, the significand is rounded according to the preci-

sion control (PC) field of the FPU control word or according to the opcode. On the 16-bit IA-32

math coprocessors, the precision exception is not flagged and the significand is not rounded. The

impact on existing software is that if the result is stored on the stack, a program running on a 32-

bit x87 FPU produces a different result under overflow conditions than on a 16-bit IA-32 math

coprocessor. The difference is apparent only to the exception handler. This difference is for

IEEE Standard 754 compatibility.

17.17.6.3 NUMERIC UNDERFLOW EXCEPTION (#U)

When the underflow exception is masked on the 32-bit x87 FPUs, the underflow exception is

signaled when both the result is tiny and denormalization results in a loss of accuracy. When the

underflow exception is unmasked and the instruction is supposed to store the result on the stack,

the significand is rounded to the appropriate precision (according to the PC flag in the FPU

control word, for those instructions controlled by PC, otherwise to extended precision), after

adjusting the exponent.

When the underflow exception is masked on the 16-bit IA-32 math coprocessors and rounding

is toward 0, the underflow exception flag is raised on a tiny result, regardless of loss of accuracy.

When the underflow exception is not masked and the destination is the stack, the significand is

not rounded, but instead is left as is.

When the underflow exception is masked, this difference has no impact on existing software.

The underflow exception occurs less often when rounding is toward 0.

When the underflow exception not masked. A program running on a 32-bit x87 FPU produces

a different result during underflow conditions than on a 16-bit IA-32 math coprocessor if the

result is stored on the stack. The difference is only in the least significant bit of the significand

and is apparent only to the exception handler.

17.17.6.4 EXCEPTION PRECEDENCE

There is no difference in the precedence of the denormal-operand exception on the 32-bit x87

FPUs, whether it be masked or not. When the denormal-operand exception is not masked on the

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Intel ARCHITECTURE IA-32 User Manual Page 604