Intel ARCHITECTURE IA-32 User Manual download pdf (Page 284)

7-16 Vol. 3A

MULTIPLE-PROCESSOR MANAGEMENT

• Intel Xeon processors with family, model, and stepping IDs up to F09H — The

selection of the BSP and APs (see Section 7.5.1, “BSP and AP Processors”) is handled

through arbitration on the system bus, using BIPI and FIPI messages (see Section 7.5.3,

“MP Initialization Protocol Algorithm for Intel Xeon Processors”).

• Intel Xeon processors with family, model, and stepping IDs of F0AH and beyond —

The selection of the BSP and APs is handled through a special system bus cycle, without

using BIPI and FIPI message arbitration (see Section 7.5.3, “MP Initialization Protocol

Algorithm for Intel Xeon Processors”).

The family, model, and stepping ID for a processor is given in the EAX register when the

CPUID instruction is executed with a value of 1 in the EAX register.

7.5.1 BSP and AP Processors

The MP initialization protocol defines two classes of processors: the bootstrap processor (BSP)

and the application processors (APs). Following a power-up or RESET of an MP system, system

hardware dynamically selects one of the processors on the system bus as the BSP. The remaining

processors are designated as APs.

As part of the BSP selection mechanism, the BSP flag is set in the IA32_APIC_BASE MSR (see

Figure 8-5) of the BSP, indicating that it is the BSP. This flag is cleared for all other processors.

The BSP executes the BIOS’s boot-strap code to configure the APIC environment, sets up

system-wide data structures, and starts and initializes the APs. When the BSP and APs are

initialized, the BSP then begins executing the operating-system initialization code.

Following a power-up or reset, the APs complete a minimal self-configuration, then wait for a

startup signal (a SIPI message) from the BSP processor. Upon receiving a SIPI message, an AP

executes the BIOS AP configuration code, which ends with the AP being placed in halt state.

In IA-32 processors supporting Hyper-Threading Technology, the MP initialization protocol

treats each of the logical processors on the system bus as a separate processor (with a unique

APIC ID). During boot-up, one of the logical processors is selected as the BSP and the

remainder of the logical processors are designated as APs.

7.5.2 MP Initialization Protocol Requirements and Restrictions

for Intel Xeon Processors

The MP initialization protocol imposes the following requirements and restrictions on the

system:

• The MP protocol is executed only after a power-up or RESET. If the MP protocol has

completed and a BSP is chosen, subsequent INITs (either to a specific processor or system

wide) do not cause the MP protocol to be repeated. Instead, each logical processor

examines its BSP flag (in the IA32_APIC_BASE MSR) to determine whether it should

execute the BIOS boot-strap code (if it is the BSP) or enter a wait-for-SIPI state (if it is an

AP).

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Intel ARCHITECTURE IA-32 User Manual Page 284