Intel ARCHITECTURE IA-32 User Manual download pdf (Page 77)

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Vol. 3A 2-29

SYSTEM ARCHITECTURE OVERVIEW

See Section 18.10, “Performance Monitoring Overview,” and Section 18.9, “Time-Stamp

Counter,” for more information about the performance monitoring and time-stamp counters.

The RDTSC instruction was introduced into the IA-32 architecture with the Pentium processor.

The RDPMC instruction was introduced into the IA-32 architecture with the Pentium Pro

processor and the Pentium processor with MMX technology. Earlier Pentium processors have

two performance-monitoring counters, but they can be read only with the RDMSR instruction,

and only at privilege level 0.

2.6.6.1 Reading Counters in 64-Bit Mode

In 64-bit mode, RDTSC operates the same as in protected mode. The count in the time-stamp

counter is stored in EDX:EAX (or RDX[31:0]:RAX[31:0] with RDX[63:32]:RAX[63:32]

cleared).

RDPMC requires an index to specify the offset of the performance-monitoring counter. In 64-bit

mode for Pentium 4 or Intel Xeon processor families, the index is specified in ECX[30:0]. The

current count of the performance-monitoring counter is stored in EDX:EAX (or

RDX[31:0]:RAX[31:0] with RDX[63:32]:RAX[63:32] cleared).

2.6.7 Reading and Writing Model-Specific Registers

The RDMSR (read model-specific register) and WRMSR (write model-specific register)

instructions allow a processor’s 64-bit model-specific registers (MSRs) to be read and written,

respectively. The MSR to be read or written is specified by the value in the ECX register.

RDMSR reads the value from the specified MSR to the EDX:EAX registers; WRMSR writes

the value in the EDX:EAX registers to the specified MSR. RDMSR and WRMSR were intro-

duced into the IA-32 architecture with the Pentium processor.

See Section 9.4, “Model-Specific Registers (MSRs),” for more information.

2.6.7.1 Reading and Writing Model-Specific Registers in 64-Bit Mode

RDMSR and WRMSR require an index to specify the address of an MSR. In 64-bit mode, the

index is 32 bits; it is specified using ECX.

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