Intel ARCHITECTURE IA-32 User Manual download pdf (Page 89)

100

101

Vol. 3A 3-9

PROTECTED-MODE MEMORY MANAGEMENT

TI (table indicator) flag

(Bit 2) — Specifies the descriptor table to use: clearing this flag selects the

GDT; setting this flag selects the current LDT.

Requested Privilege Level (RPL)

(Bits 0 and 1) — Specifies the privilege level of the selector. The privilege level

can range from 0 to 3, with 0 being the most privileged level. See Section 4.5,

“Privilege Levels”, for a description of the relationship of the RPL to the CPL

of the executing program (or task) and the descriptor privilege level (DPL) of

the descriptor the segment selector points to.

The first entry of the GDT is not used by the processor. A segment selector that points to this

entry of the GDT (that is, a segment selector with an index of 0 and the TI flag set to 0) is used

as a “null segment selector.” The processor does not generate an exception when a segment

generate an exception when a segment register holding a null selector is used to access memory.

A null selector can be used to initialize unused segment registers. Loading the CS or SS register

with a null segment selector causes a general-protection exception (#GP) to be generated.

Segment selectors are visible to application programs as part of a pointer variable, but the values

of selectors are usually assigned or modified by link editors or linking loaders, not application

programs.

3.4.3 Segment Registers

To reduce address translation time and coding complexity, the processor provides registers for

holding up to 6 segment selectors (see Figure 3-7). Each of these segment registers support a

specific kind of memory reference (code, stack, or data). For virtually any kind of program

execution to take place, at least the code-segment (CS), data-segment (DS), and stack-segment

(SS) registers must be loaded with valid segment selectors. The processor also provides three

additional data-segment registers (ES, FS, and GS), which can be used to make additional data

segments available to the currently executing program (or task).

For a program to access a segment, the segment selector for the segment must have been loaded

in one of the segment registers. So, although a system can define thousands of segments, only 6

Figure 3-6. Segment Selector

Index

Table Indicator

0 = GDT

1 = LDT

Requested Privilege Level (RPL)

RPL

1 2 ... 84 85 86 87 88 89 90 91 92 93 94 ... 635 636

Comments to this Manuals

No comments

Intel ARCHITECTURE IA-32 User Manual Page 89

Comments to this Manuals

Related products and manuals for Processors Intel ARCHITECTURE IA-32