Intel ARCHITECTURE IA-32 User Manual download pdf (Page 143)

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Vol. 3A 4-13

PROTECTION

4.6.1 Accessing Data in Code Segments

In some instances it may be desirable to access data structures that are contained in a code

segment. The following methods of accessing data in code segments are possible:

• Load a data-segment register with a segment selector for a nonconforming, readable, code

segment.

• Load a data-segment register with a segment selector for a conforming, readable, code

segment.

• Use a code-segment override prefix (CS) to read a readable, code segment whose selector

is already loaded in the CS register.

The same rules for accessing data segments apply to method 1. Method 2 is always valid because

the privilege level of a conforming code segment is effectively the same as the CPL, regardless

of its DPL. Method 3 is always valid because the DPL of the code segment selected by the CS

4.7 PRIVILEGE LEVEL CHECKING WHEN LOADING THE SS

Privilege level checking also occurs when the SS register is loaded with the segment selector for

a stack segment. Here all privilege levels related to the stack segment must match the CPL; that

is, the CPL, the RPL of the stack-segment selector, and the DPL of the stack-segment descriptor

must be the same. If the RPL and DPL are not equal to the CPL, a general-protection exception

(#GP) is generated.

4.8 PRIVILEGE LEVEL CHECKING WHEN TRANSFERRING

PROGRAM CONTROL BETWEEN CODE SEGMENTS

To transfer program control from one code segment to another, the segment selector for the

destination code segment must be loaded into the code-segment register (CS). As part of this

loading process, the processor examines the segment descriptor for the destination code segment

and performs various limit, type, and privilege checks. If these checks are successful, the CS

tion begins at the instruction pointed to by the EIP register.

Program control transfers are carried out with the JMP, CALL, RET, SYSENTER, SYSEXIT,

INT n, and IRET instructions, as well as by the exception and interrupt mechanisms. Exceptions,

interrupts, and the IRET instruction are special cases discussed in Chapter 5, “Interrupt and

Exception Handling.” This chapter discusses only the JMP, CALL, RET, SYSENTER, and

SYSEXIT instructions.

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