Intel ARCHITECTURE IA-32 User Manual download pdf (Page 61)

Vol. 3A 2-13

SYSTEM ARCHITECTURE OVERVIEW

The IOPL is also one of the mechanisms that controls the modification of the IF flag

and the handling of interrupts in virtual-8086 mode when virtual mode extensions are

in effect (when CR4.VME = 1). See also: Chapter 13, “Input/Output,” in the IA-32

Intel® Architecture Software Developer’s Manual, Volume 1.

NT Nested task (bit 14) — Controls the chaining of interrupted and called tasks. The

processor sets this flag on calls to a task initiated with a CALL instruction, an interrupt,

or an exception. It examines and modifies this flag on returns from a task initiated with

the IRET instruction. The flag can be explicitly set or cleared with the POPF/POPFD

instructions; however, changing to the state of this flag can generate unexpected excep-

tions in application programs.

See also: Section 6.4, “Task Linking.”

RF Resume (bit 16) — Controls the processor’s response to instruction-breakpoint condi-

tions. When set, this flag temporarily disables debug exceptions (#DB) from being

generated for instruction breakpoints (although other exception conditions can

cause an exception to be generated). When clear, instruction breakpoints will

generate debug exceptions.

The primary function of the RF flag is to allow the restarting of an instruction following

a debug exception that was caused by an instruction breakpoint condition. Here, debug

software must set this flag in the EFLAGS image on the stack just prior to returning to

the interrupted program with IRETD (to prevent the instruction breakpoint from

causing another debug exception). The processor then automatically clears this flag

after the instruction returned to has been successfully executed, enabling instruction

breakpoint faults again.

See also: Section 18.3.1.1, “Instruction-Breakpoint Exception Condition.”

VM Virtual-8086 mode (bit 17) — Set to enable virtual-8086 mode; clear to return to

protected mode.

See also: Section 15.2.1, “Enabling Virtual-8086 Mode.”

AC Alignment check (bit 18) — Set this flag and the AM flag in control register CR0 to

enable alignment checking of memory references; clear the AC flag and/or the AM flag

to disable alignment checking. An alignment-check exception is generated when refer-

ence is made to an unaligned operand, such as a word at an odd byte address or a

doubleword at an address which is not an integral multiple of four. Alignment-check

exceptions are generated only in user mode (privilege level 3). Memory references that

default to privilege level 0, such as segment descriptor loads, do not generate this

exception even when caused by instructions executed in user-mode.

The alignment-check exception can be used to check alignment of data. This is useful

when exchanging data with processors which require all data to be aligned. The align-

ment-check exception can also be used by interpreters to flag some pointers as special

by misaligning the pointer. This eliminates overhead of checking each pointer and only

handles the special pointer when used.

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Intel ARCHITECTURE IA-32 User Manual Page 61