Datasheet, Volume 2 295
Processor Configuration Registers
2.19.10 SBUSN6—Secondary Bus Number Register
This register identifies the bus number assigned to the second bus side of the "virtual"
bridge (that is, to PCI Express-G). This number is programmed by the PCI configuration
software to allow mapping of configuration cycles to PCI Express-G.
2.19.11 SUBUSN6—Subordinate Bus Number Register
This register identifies the subordinate bus (if any) that resides at the level below PCI
Express-G. This number is programmed by the PCI configuration software to allow
mapping of configuration cycles to PCI Express-G.
B/D/F/Type: 0/6/0/PCI
Address Offset: 19h
Reset Value: 00h
Access: RW
Bit Attr
Reset
Value
Description
7:0 RW 00h
Secondary Bus Number (BUSN)
This field is programmed by configuration software with the bus number
assigned to PCI Express-G.
B/D/F/Type: 0/6/0/PCI
Address Offset: 1Ah
Reset Value: 00h
Access: RW
Bit Attr
Reset
Value
Description
7:0 RW 00h
Subordinate Bus Number (BUSN)
This register is programmed by configuration software with the number of
the highest subordinate bus that lies behind the device 6 bridge. When only a
single PCI device resides on the PCI Express-G segment, this register will
contain the same value as the SBUSN6 register.
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