Intel SL22T Specifications download pdf (Page 25)

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LOCAL X2APIC ARCHITECTURE

2.7.1.1 x2APIC After RESET

The valid transitions from the xAPIC mode state are:

• to the x2APIC mode by setting EXT to 1 (resulting EN=1, EXTD= 1). The physical

x2APIC ID (see Figure 2-3) is preserved across this transition and the logical

x2APIC ID (see Figure 2-4) is initialized by hardware during this transition as

documented in Section 2.4.4. The state of the extended fields in other APIC

registers, which was not initialized at RESET, is not architecturally defined across

this transition and system software should explicitly initialize those program-

mable APIC registers.

• to the disabled state by setting EN to 0 (resulting EN=0, EXTD= 0).

The result of an INIT in the xAPIC state places the x2APIC in the state with EN= 1,

EXTD= 0. The state of the local APIC ID register is preserved (the 8-bit xAPIC ID is in

the upper 8 bits of the APIC ID register). All the other APIC registers are initialized as

a result of INIT.

A RESET in this state places the x2APIC in the state with EN= 1, EXTD= 0. The state

of the local APIC ID register is initialized as described in Section 2.7.1. All the other

APIC registers are initialized described in Section 2.7.1.

2.7.1.2 x2APIC Transitions From x2APIC Mode

From the x2APIC mode, the only valid x2APIC transition using IA32_APIC_BASE is to

the state where the x2APIC is disabled by setting EN to 0 and EXTD to 0. The x2APIC

ID (32 bits) and the legacy local xAPIC ID (8 bits) are preserved across this transi-

tion. A transition from the x2APIC mode to xAPIC mode is not valid and the corre-

sponding WRMSR to the IA32_APIC_BASE MSR will raise a GP fault.

A RESET in this state places the x2APIC in xAPIC mode. All APIC registers (including

the local APIC ID register) are initialized as described in Section 2.7.1.

An INIT in this state keeps the x2APIC in the x2APIC mode. The state of the local

APIC ID register is preserved (all 32 bits). However, all the other APIC registers are

initialized as a result of the INIT transition.

2.7.1.3 x2APIC Transitions From Disabled Mode

From the disabled state, the only valid x2APIC transition using IA32_APIC_BASE is to

the xAPIC mode (EN= 1, EXTD = 0). Thus the only means to transition from x2APIC

mode to xAPIC mode is a two-step process:

• first transition from x2APIC mode to local APIC disabled mode (EN= 0, EXTD =

0),

• followed by another transition from disabled mode to xAPIC mode (EN= 1,

EXTD= 0).

Consequently, all the APIC register states in the x2APIC, except for the x2APIC ID

(32 bits), are not preserved across mode transitions.

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Intel SL22T Specifications Page 25