Intel LF80537GG0252M Datasheet download pdf (Page 39)

Datasheet

Electrical Specifications

NOTES:

1. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at

manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing

such that two processors at the same frequency may have different settings within the VID range. Note

that this differs from the VID employed by the processor during a power management event (Intel Thermal

Monitor 2, Enhanced Intel SpeedStep Technology, or Enhanced Halt State).

2. The voltage specifications are assumed to be measured across V

CC_SENSE

and V

SS_SENSE

pins at socket with

a 100-MHz bandwidth oscilloscope, 1.5-pF maximum probe capacitance, and 1-MΩ minimum impedance.

The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from

the system is not coupled in the scope probe.

3. Specified at 105 °C T

4. Specified at the nominal V

5. Measured at the bulk capacitors on the motherboard.

6. V

CC,BOOT

tolerance shown in Figure 7 and Figure 8.

7. Based on simulations and averaged over the duration of any change in current. Specified by design/

characterization at nominal V

. Not 100% tested.

8. This is a power-up peak current specification that is applicable when V

CCP

is high and V

CC_CORE

is low.

9. This is a steady-state I

current specification that is applicable when both V

CCP

and V

CC_CORE

are high.

10. Processor I

requirements in Intel Dynamic Acceleration Technology mode are lesser than I

in HFM

11. The maximum delta between Intel Enhanced Deeper Sleep and LFM on the processor will be lesser than or

equal to 300 mV.

12. Instantaneous current I

CC_CORE_INST

of 36 A has to be sustained for short time (t

INST

) of 35 µs. Average

current will be less than maximum specified I

CCDES

. VR OCP threshold should be high enough to support

current levels described herein.

DSLP

Deep Sleep

HFM

SuperLFM

——10.5

7.5

A 3, 4, 12

DPRSLP

Deeper Sleep — — 6.5 A 3, 4

DC4

Intel Enhanced Deeper Sleep — — 5.6 A 3, 4

DPWDN

Deep Power Down Technology State (C6) — — 3.2 A 3, 4

CC/DT

Power Supply Current Slew Rate at Processor

Package Pin

——600mA/µs7, 9

CCA

for V

CCA

Supply — — 130 mA

CCP

for V

CCP

Supply before V

Stable

for V

CCP

Supply after V

Stable

——

4.5

2.5

Table 10. Voltage and Current Specifications for the Dual-Core, Low-Voltage SFF

Processor

Symbol Parameter Min Typ Max Unit Notes

1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 112 113

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Intel LF80537GG0252M Datasheet Page 39

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