Intel LF80537GG0252M Datasheet download pdf (Page 20)

Low Power Features

20 Datasheet

2.3 Extended Low-Power States

Extended low-power states (CXE) optimize for power by forcibly reducing the

performance state of the processor when it enters a package low-power state. Instead

of directly transitioning into the package low-power state, the enhanced package low-

power state first reduces the performance state of the processor by performing an

Enhanced Intel SpeedStep Technology transition down to the lowest operating point.

Upon receiving a break event from the package low-power state, control will be

returned to software while an Enhanced Intel SpeedStep Technology transition up to

the initial operating point occurs. The advantage of this feature is that it significantly

reduces leakage while in the Stop-Grant and Deeper Sleep states.

Deep Power Down Technology is always enabled in the extended low power state as

described above.

Note: Long-term reliability cannot be assured unless all the Extended Low Power States are

enabled.

The processor implements two software interfaces for requesting enhanced package

low-power states: MWAIT instruction extensions with sub-state hints and via BIOS by

configuring IA32_MISC_ENABLES MSR bits to automatically promote package low-

power states to enhanced package low-power states.

Caution: Extended Stop-Grant and Enhanced Deeper Sleep must be enabled via the

BIOS for the processor to remain within specification. As processor technology

changes, enabling the extended low power states becomes increasingly crucial when

building computer systems. Maintaining the proper BIOS configuration is key to

reliable, long-term system operation. Not complying to this guideline may affect the

long-term reliability of the processor.

Caution: Enhanced Intel SpeedStep Technology transitions are multistep processes

that require clocked control. These transitions cannot occur when the processor is in

the Sleep or Deep Sleep package low-power states since processor clocks are not

active in these states. Extended Deeper Sleep is an exception to this rule when the

Hard C4E configuration is enabled in the IA32_MISC_ENABLES MSR. This Extended

Deeper Sleep state configuration will lower core voltage to the Deeper Sleep level while

in Deeper Sleep and, upon exit, will automatically transition to the lowest operating

voltage and frequency to reduce snoop service latency. The transition to the lowest

operating point or back to the original software-requested point may not be

instantaneous. Furthermore, upon very frequent transitions between active and idle

states, the transitions may lag behind the idle state entry resulting in the processor

either executing for a longer time at the lowest operating point or running idle at a high

operating point. Observations and analyses show this behavior should not significantly

impact total power savings or performance score while providing power benefits in

most other cases.

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Intel LF80537GG0252M Datasheet Page 20