Intel E3-1275 Datasheet download pdf (Page 53)

Datasheet, Volume 2 53

Processor Configuration Registers

2.5.6 CC—Class Code Register

This register identifies the basic function of the device, a more specific sub-class, and a

2.5.7 HDR—Header Type Register

This register identifies the header layout of the configuration space. No physical

B/D/F/Type: 0/0/0/PCI

Address Offset: 9–Bh

Reset Value: 06_0000h

Access: RO

Size: 24 bits

Bit Attr

Reset

Value

RST/

PWR

Description

23:16 RO 06h Uncore

Base Class Code (BCC)

This is an 8-bit value that indicates the base class code for the Host

Bridge device. This code has the value 06h, indicating a Bridge

device.

15:8 RO 00h Uncore

Sub-Class Code (SUBCC)

This is an 8-bit value that indicates the category of Bridge into

which the Host Bridge device falls. The code is 00h indicating a

Host Bridge.

7:0 RO 00h Uncore

Programming Interface (PI)

This is an 8-bit value that indicates the programming interface of

this device. This value does not specify a particular register set

layout and provides no practical use for this device.

B/D/F/Type: 0/0/0/PCI

Address Offset: Eh

Reset Value: 00h

Access: RO

Size: 8 bits

Bit Attr

Reset

Value

RST/

PWR

Description

7:0 RO 00h Uncore

PCI Header (HDR)

This field always returns 0 to indicate that the Host Bridge is a

single function device with standard header layout. Reads and

writes to this location have no effect.

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Intel E3-1275 Datasheet Page 53

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