Intel E3-1275 Datasheet Page 264
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Processor Configuration Registers
264 Datasheet, Volume 2
2.19.4 MEM_TRML_TEMPERATURE_REPORT—Memory Thermal
Temperature Report Register
This register is used to report the estimated thermal status of the memory. The
Channel VTS estimated maximum temperature field is used to report the estimated
maximum temperature of all ranks.
2.19.5 MEM_TRML_INTERRUPT—Memory Thermal Interrupt
Register
Hardware uses the information in this register to determine whether a memory thermal
interrupt is to be generated or not.
B/D/F/Type: 0/0/0/MCHBAR PCU
Address Offset: 58A4–58A7h
Reset Value: 0000_0000h
Access: RO-V
Size: 32 bits
BIOS Optimal Default 00h
Bit Attr
Reset
Value
RST/
PWR
Description
31:24 RO 0h Reserved
23:16 RO-V 00h Reserved
15:8 RO-V 00h Uncore
Channel 1 VTS Estimated Max Temperature
(CHANNEL1_ESTIMATED_MAX_TEMPERATURE)
VTS Estimated Temperature in Degrees C.
7:0 RO-V 00h Uncore
Channel 0 VTS Estimated Max Temperature
(CHANNEL0_ESTIMATED_MAX_TEMPERATURE)
VTS Estimated Temperature in Degrees C.
B/D/F/Type: 0/0/0/MCHBAR PCU
Address Offset: 58A8–58ABh
Reset Value: 0000_0000h
Access: RW
Size: 32 bits
BIOS Optimal Default 0000_0000h
Bit Attr
Reset
Value
RST/
PWR
Description
31:5 RO 0h Reserved
4 RW 0b Uncore
Critical Threshold Interrupt Enable
(CRITICAL_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the
Critical Threshold temperature is crossed.
3 RO 0h Reserved
2 RW 0b Uncore
Hot Threshold Interrupt Enable
(HOT_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the Hot
Threshold temperature is crossed.
1 RO 0h Reserved
0 RW 0b Uncore
Warm Threshold Interrupt Enable
(WARM_THRESHOLD_INT_ENABLE)
This bit controls the generation of a thermal interrupt when the
Warm Threshold temperature is crossed.
- Processor E3-1200 Family 1
- Legal Lines and Disclaimers 2
- Contents 3
- 4 Datasheet, Volume 2 4
- Datasheet, Volume 2 5 5
- 6 Datasheet, Volume 2 6
- Datasheet, Volume 2 7 7
- 8 Datasheet, Volume 2 8
- Datasheet, Volume 2 9 9
- Revision History 10
- 1 Introduction 11
- Introduction 12
- 2 Processor Configuration 13
- 2.3 System Address Map 15
- 16 Datasheet, Volume 2 16
- HOST/SYSTEM VIEW 17
- PHYSICAL MEMORY 17
- (DRAM CONTROLLER VIEW) 17
- 2.3.1 Legacy Address Range 18
- Datasheet, Volume 2 19 19
- 2.3.2.2 TSEG 21
- 2.3.2.5 Pre-allocated Memory 22
- 2.3.2.6 GFX Stolen Spaces 23
- 2.3.2.7 ME UMA 23
- 24 Datasheet, Volume 2 24
- 2.3.3.4 High BIOS Area 25
- 26 Datasheet, Volume 2 26
- Datasheet, Volume 2 27 27
- 2.3.4.3 Memory Remapping 28
- 2.3.4.5 Programming Model 28
- Datasheet, Volume 2 31 31
- 32 Datasheet, Volume 2 32
- Datasheet, Volume 2 33 33
- 34 Datasheet, Volume 2 34
- 2.3.11 I/O Address Space 36
- 2.3.12 MCTP and KVM Flows 37
- 38 Datasheet, Volume 2 38
- Datasheet, Volume 2 39 39
- 40 Datasheet, Volume 2 40
- Datasheet, Volume 2 41 41
- 44 Datasheet, Volume 2 44
- Datasheet, Volume 2 45 45
- 2.4.1 I/O Mapped Registers 46
- CAPPTR contains an 51
- 8h in the standard PCI 52
- 2.5.6 CC—Class Code Register 53
- 2.5.30 G Memory Base Register 78
- 2.5.34 SMI Command Register 81
- 22–23 for channel 1) 83
- 2.6.6 CC1—Class Code Register 92
- Register 101
- Port Command Register 113
- Configuration Registers 127
- 108–10Bh 128
- 10C–10Dh 128
- 110–113h 129
- 114–117h 130
- 11A–11Bh 131
- 208–20Bhh 131
- 2.8.6 CC—Class Code Register 136
- Mapped Range Address Register 138
- for details 139
- Device uses INTA# 141
- 2.9 Device 2 I/O Registers 144
- PCI device 147
- -Posted 149
- 2 RW 0b Uncore 163
- 104–107h 183
- 2.12 DMIBAR Registers 188
- Declaration Capability 198
- BC0–BC3h 206
- BCC–BCGh 206
- Channel 0 207
- 40C8–40CBh 210
- 40CC–40CFh 210
- 4294-4297h 211
- 4298-429Bh 211
- Channel 1 212
- 44C8–44CBh 215
- 44CC–44CFh 215
- 4694–4697h 216
- 4698–469Bh 216
- Register Symbol Register Name 217
- 740C–740Fh 217
- 5004–5007h 219
- 5008–500Bh 220
- 5060–5063h 221
- 4CB0-4CB3h 222
- 4CC8–4CCBh 223
- 4CCC–4CCFh 223
- Registers 225
- 100–107h 254
- 108–10Fh 255
- 200–207h 257
- 208–20Fh 258
- FF0–FF3h 259
- 2.19 PCU MCHBAR Registers 260
- 5880–5883h 261
- 5888–588Bh 262
- Report Register 263
- Temperature Report Register 264
- 5948-594Bh 265
- 5998-599Bh 265
- 5D10–5D17h 266
- 2.20 PXPEPBAR Registers 268
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