Intel E3-1275 Datasheet download pdf (Page 3)

Datasheet, Volume 2 3

Contents

1 Introduction ............................................................................................................ 11

2 Processor Configuration Registers........................................................................... 13

2.1 Register Terminology......................................................................................... 13

2.2 PCI Devices and Functions on Processor ............................................................... 14

2.3 System Address Map ......................................................................................... 15

2.3.1 Legacy Address Range ......................................................................... 18

2.3.1.1 DOS Range (0h–9_FFFFh).......................................................... 18

2.3.1.2 Legacy Video Area (A_0000h–B_FFFFh) ....................................... 19

2.3.1.3 PAM (C_0000h–F_FFFFh)........................................................... 20

2.3.2 Main Memory Address Range (1 MB – TOLUD)......................................... 20

2.3.2.1 ISA Hole (15 MB–16 MB) ...........................................................21

2.3.2.2 TSEG ......................................................................................21

2.3.2.3 Protected Memory Range (PMR) – (programmable) .......................21

2.3.2.4 DRAM Protected Range (DPR)..................................................... 22

2.3.2.5 Pre-allocated Memory ............................................................... 22

2.3.2.6 GFX Stolen Spaces.................................................................... 23

2.3.2.7 ME UMA .................................................................................. 23

2.3.3 PCI Memory Address Range (TOLUD – 4 GB)...........................................23

2.3.3.1 APIC Configuration Space (FEC0_0000h–FECF_FFFFh) ................... 25

2.3.3.2 HSEG (FEDA_0000h–FEDB_FFFFh)..............................................25

2.3.3.3 MSI Interrupt Memory Space (FEE0_0000h–FEEF_FFFFh)............... 25

2.3.3.4 High BIOS Area ........................................................................ 25

2.3.4 Main Memory Address Space (4 GB to TOUUD)........................................ 26

2.3.4.1 Memory Re-claim Background .................................................... 27

2.3.4.2 Indirect Accesses to MCHBAR Registers........................................27

2.3.4.3 Memory Remapping ..................................................................28

2.3.4.4 Hardware Remap Algorithm........................................................28

2.3.4.5 Programming Model .................................................................. 28

2.3.5 PCI Express* Configuration Address Space .............................................32

2.3.6 PCI Express* Graphics Attach (PEG) ...................................................... 33

2.3.7 Graphics Memory Address Ranges ......................................................... 34

2.3.7.1 IOBAR Mapped Access to Device 2 MMIO Space ............................ 34

2.3.7.2 Trusted Graphics Ranges ........................................................... 34

2.3.8 System Management Mode (SMM)......................................................... 35

2.3.9 SMM and VGA Access through GTT TLB ................................................. 35

2.3.10 ME Stolen Memory Accesses ................................................................. 35

2.3.11 I/O Address Space ..............................................................................36

2.3.11.1 PCI Express* I/O Address Mapping..............................................36

2.3.12 MCTP and KVM Flows........................................................................... 37

2.3.13 Decode Rules and Cross-Bridge Address Mapping ....................................37

2.3.13.1 DMI Interface Decode Rules ...................................................... 37

2.3.13.2 PCI Express* Interface Decode Rules........................................... 40

2.3.13.3 Legacy VGA and I/O Range Decode Rules..................................... 41

2.4 Processor Register Introduction........................................................................... 45

2.4.1 I/O Mapped Registers .......................................................................... 46

2.5 PCI Device 0, Function 0 Configuration Registers ...................................................46

2.5.1 VID—Vendor Identification Register ....................................................... 48

2.5.2 DID—Device Identification Register........................................................ 48

2.5.3 PCICMD—PCI Command Register ..........................................................49

2.5.4 PCISTS—PCI Status Register ................................................................ 50

2.5.5 RID—Revision Identification Register ..................................................... 52

2.5.6 CC—Class Code Register ......................................................................53

2.5.7 HDR—Header Type Register.................................................................. 53

2.5.8 SVID—Subsystem Vendor Identification Register ..................................... 54

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Intel E3-1275 Datasheet Page 3

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