Intel CW8064701487007 Datasheet download pdf (Page 82)

Thermal Management

82 Datasheet, Volume 1

The TCC will remain active until the system de-asserts PROCHOT#. The processor can

be configured to generate an interrupt upon assertion and de-assertion of the

PROCHOT# signal.

Note: Toggling PROCHOT# more than once in 1.5 ms period will result in constant Pn state of

the processor.

5.6.3.2 Voltage Regulator Protection versus PROCHOT#

PROCHOT# may be used for thermal protection of voltage regulators (VR). System

designers can create a circuit to monitor the VR temperature and activate the TCC

when the temperature limit of the VR is reached. By asserting PROCHOT# (pulled low)

and activating the TCC, the VR will cool down as a result of reduced processor power

consumption. Bi-directional PROCHOT# can allow VR thermal designs to target thermal

design current (I

CCTDC

) instead of maximum current. Systems should still provide

proper cooling for the VR and rely on bi-directional PROCHOT# only as a backup in case

of system cooling failure. Overall, the system thermal design should allow the power

delivery circuitry to operate within its temperature specification even while the

processor is operating at its TDP.

5.6.3.3 Thermal Solution Design and PROCHOT# Behavior

With a properly designed and characterized thermal solution, it is anticipated that

PROCHOT# will only be asserted for very short periods of time when running the most

power intensive applications. The processor performance impact due to these brief

periods of TCC activation is expected to be so minor that it would be immeasurable.

However, an under-designed thermal solution that is not able to prevent excessive

assertion of PROCHOT# in the anticipated ambient environment may:

• Cause a noticeable performance loss.

• Result in prolonged operation at or above the specified maximum junction

temperature and affect the long-term reliability of the processor.

• May be incapable of cooling the processor even when the TCC is active continuously

(in extreme situations).

5.6.3.4 Low-Power States and PROCHOT# Behavior

If the processor enters a low-power package idle state such as C3 or C6/C7 with

PROCHOT# asserted, PROCHOT# will remain asserted until:

• The processor exits the low-power state.

• The processor junction temperature drops below the thermal trip point.

For the package C7 state, PROCHOT# may de-assert for the duration of C7 state

residency even if the processor enters the idle state operating at the TCC activation

temperature. The PECI interface is fully operational during all C-states and it is

expected that the platform continues to manage processor core and package thermals,

even during idle states by regularly polling for thermal data over PECI.

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Intel CW8064701487007 Datasheet Page 82