Intel CW8064701487007 Datasheet download pdf (Page 38)

Interfaces

38 Datasheet, Volume 1

2.4.2 Processor Graphics Display

The Processor Graphics controller display pipe can be broken down into three

components:

• Display Planes

• Display Pipes

• Embedded DisplayPort* and Intel

FDI

2.4.2.1 Display Planes

A display plane is a single displayed surface in memory and contains one image

(desktop, cursor, overlay). It is the portion of the display hardware logic that defines

the format and location of a rectangular region of memory that can be displayed on

display output device and delivers that data to a display pipe. This is clocked by the

Core Display Clock.

2.4.2.1.1 Primary Planes A, B, and C

Planes A, B, and C are the main display planes and are associated with Pipes A, B, and

C respectively.

2.4.2.1.2 Sprite A, B, and C

Sprite A and Sprite B are planes optimized for video decode, and are associated with

Planes A and B respectively. Sprite A and B are also double-buffered.

2.4.2.1.3 Cursors A, B, and C

Cursors A and B are small, fixed-sized planes dedicated for mouse cursor acceleration,

and are associated with Planes A and B respectively. These planes support resolutions

up to 256 x 256 each.

2.4.2.1.4 Video Graphics Array (VGA)

VGA is used for boot, safe mode, legacy games, and so on. It can be changed by an

application without operating system/driver notification, due to legacy requirements.

Figure 2-7. Processor Display Block Diagram

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 171 172

No comments

Intel CW8064701487007 Datasheet Page 38