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Jumper Blocks Intel® Server Board S1200BT TPS
Revision 1.0
Intel order number G13326-003
108
1. Power down and remove the AC power cord.
2. Open the server chassis. For instructions, see your server chassis documentation.
3. Move jumper from the default operating position (covering pins 1 and 2) to the enabled
position (covering pins 2 and 3).
4. Close the server chassis.
5. Reconnect the AC cord and power up the server.
6. Perform the ME firmware update procedure as documented in the README.TXT file
that is included in the given ME firmware update package (same package as BIOS).
7. Power down and remove the AC power cord.
8. Open the server chassis.
9. Move jumper from the enabled position (covering pins 2 and 3) to the disabled position
(covering pins 1 and 2).
10. Close the server chassis.
11. Reconnect the AC cord and power up the server.
8.4 BIOS Recovery Jumper
The following procedure boots the recovery BIOS and flashes the normal BIOS:
1. Turn off the system power.
2. Move the BIOS recovery jumper to the recovery state.
3. Insert a bootable BIOS recovery media containing the new BIOS image files.
4. Turn on the system power.
The BIOS POST screen will appear displaying the progress, and the system will boot to the EFI
shell. The EFI shell then executes the Startup.nsh batch file to start the flash update process.
The user should then switch off the power and return the recovery jumper to its normal position.
The user should not interrupt the BIOS POST on the first boot after recovery.
When the flash update completes:
1. Remove the recovery media .
2. Turn off the system power .
3. Restore the jumper to its original position.
4. Turn on the system power.
5. Re-flash any custom blocks, such as user binary
or language blocks.
The system should now boot using the updated system BIOS.
- Server Board S1200BT 1
- Revision History 2
- Disclaimers 3
- Table of Contents 4
- List of Figures 8
- List of Tables 10
- Revision 1.0 11
- 1. Introduction 13
- 2. Overview 14
- 2.2 Server Board Layout 16
- 2.2.2 Intel 20
- 3. Functional Architecture 27
- 3.1 Processor Sub-System 28
- 3.2 Memory Subsystem 29
- 3.2.1 Memory Supported 30
- 3.2.2 Post Error Codes 30
- 3.3 Intel 33
- Chipset PCH 33
- 3.4 I/O Sub-system 34
- 3.4.5 USB 2.0 Support 35
- 3.5 Optional Intel 36
- SAS RAID Module 36
- 3.6.3 Serial Ports 39
- 3.7 Video Support 40
- 3.7.2 Video for Intel 41
- Server Board S1200BTS 41
- 4. Platform Management 44
- 4.1 Feature Support 45
- 4.2.3 Media Redirection 50
- 4.2.4 Embedded Web server 51
- 4.3 Thermal Control 53
- 4.4 Intel 54
- 4.4.2 Features 55
- Server 58
- Board S1200BTS 58
- 6. BIOS User Interface 59
- 6.4 BIOS Boot Pop-up Menu 62
- 6.5 BIOS Setup Utility 62
- Table 16. Screen Map 66
- Frequency 74
- Hardware Prefetcher 74
- Adjacent Cache Line Prefetch 74
- 6.5.2.8 USB Configuration 84
- [40%/60%/80%/100%] 93
- Revision 1.0 102
- 7.2 Power Connectors 103
- 7.3.1 Intel 104
- RMM4) Lite connetor and 104
- Dedicated NIC connector 104
- 7.3.4 SGPIO Header 105
- 7.3.2 LPC/IPMB Header 105
- 7.3.3 HSBP Header 105
- 7.4.1 Power Button 106
- 7.4.2 Reset Button 107
- 7.5 I/O Connectors 108
- 7.5.3 SATA 109
- 7.5.4 SAS Connectors 109
- 7.5.6 USB Connector 111
- 7.7 Fan Headers 115
- 8. Jumper Blocks 116
- 8.1.1 Clearing the CMOS 118
- 8.1.2 Clearing the Password 118
- Server Board S1200BTL) 119
- 8.3 ME Force Update Jumper 119
- 8.4 BIOS Recovery Jumper 120
- 9. Intel 121
- Light Guided Diagnostics 121
- 10.1 Intel 123
- 10.3.1 Grounding 125
- 10.3.2 Standby Outputs 125
- 10.3.3 Remote Sense 125
- 10.3.4 Voltage Regulation 125
- 10.3.5 Dynamic Loading 125
- 10.3.6 Capacitive Loading 126
- 10.3.8 Common Mode Noise 126
- 10.3.9 Ripple/Noise 126
- 10.3.10 Timing Requirements 126
- 10.3.12 Protection Circuits 129
- Sensor Type Codes 132
- Table 56. BMC Core Sensors 134
- Appendix D: POST Code Errors 145
- POST Error Beep Codes 147
- Appendix E: Supported Intel 148
- Server Chassis 148
- Glossary 149
- Reference Documents 153
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