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Land Listing and Signal Descriptions
60 Datasheet
Table 25. Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction
A2 VSS Power/Other
A3 RS2# Common Clock Input
A4 D02# Source Synch Input/Output
A5 D04# Source Synch Input/Output
A6 VSS Power/Other
A7 D07# Source Synch Input/Output
A8 DBI0# Source Synch Input/Output
A9 VSS Power/Other
A10 D08# Source Synch Input/Output
A11 D09# Source Synch Input/Output
A12 VSS Power/Other
A13 COMP0 Power/Other Input
A14 D50# Source Synch Input/Output
A15 VSS Power/Other
A16 DSTBN3# Source Synch Input/Output
A17 D56# Source Synch Input/Output
A18 VSS Power/Other
A19 D61# Source Synch Input/Output
A20 RESERVED
A21 VSS Power/Other
A22 D62# Source Synch Input/Output
A23 VCCA Power/Other
A24 FC23 Power/Other
A25 VTT Power/Other
A26 VTT Power/Other
A27 VTT Power/Other
A28 VTT Power/Other
A29 VTT Power/Other
A30 VTT Power/Other
B1 VSS Power/Other
B2 DBSY# Common Clock Input/Output
B3 RS0# Common Clock Input
B4 D00# Source Synch Input/Output
B5 VSS Power/Other
B6 D05# Source Synch Input/Output
B7 D06# Source Synch Input/Output
B8 VSS Power/Other
B9 DSTBP0# Source Synch Input/Output
B10 D10# Source Synch Input/Output
B11 VSS Power/Other
B12 D13# Source Synch Input/Output
B13 COMP8 Power/Other Input
B14 VSS Power/Other
B15 D53# Source Synch Input/Output
B16 D55# Source Synch Input/Output
B17 VSS Power/Other
B18 D57# Source Synch Input/Output
B19 D60# Source Synch Input/Output
B20 VSS Power/Other
B21 D59# Source Synch Input/Output
B22 D63# Source Synch Input/Output
B23 VSSA Power/Other
B24 VSS Power/Other
B25 VTT Power/Other
B26 VTT Power/Other
B27 VTT Power/Other
B28 VTT Power/Other
B29 VTT Power/Other
B30 VTT Power/Other
C1 DRDY# Common Clock Input/Output
C2 BNR# Common Clock Input/Output
C3 LOCK# Common Clock Input/Output
C4 VSS Power/Other
C5 D01# Source Synch Input/Output
C6 D03# Source Synch Input/Output
C7 VSS Power/Other
C8 DSTBN0# Source Synch Input/Output
C9 FC38 Power/Other
C10 VSS Power/Other
C11 D11# Source Synch Input/Output
C12 D14# Source Synch Input/Output
C13 VSS Power/Other
C14 D52# Source Synch Input/Output
C15 D51# Source Synch Input/Output
C16 VSS Power/Other
C17 DSTBP3# Source Synch Input/Output
C18 D54# Source Synch Input/Output
C19 VSS Power/Other
Table 25. Numerical Land
Assignment
Land
#
Land Name
Signal Buffer
Type
Direction
- Datasheet 1
- 2 Datasheet 2
- Contents 3
- 4 Datasheet 4
- Datasheet 5 5
- 6 Datasheet 6
- Revision History 7
- 8 Datasheet 8
- Datasheet 9 9
- 10 Datasheet 10
- 1 Introduction 11
- 1.1 Terminology 12
- Datasheet 13 13
- Introduction 13
- 1.2 References 14
- 2.1 Power and Ground Lands 15
- 2.2 Decoupling Guidelines 15
- 2.3 Voltage Identification 16
- Datasheet 17 17
- Electrical Specifications 17
- 18 Datasheet 18
- Datasheet 19 19
- 20 Datasheet 20
- Datasheet 21 21
- 1, 2, 3, 4 22
- Figure 1. V 23
- Overshoot 25
- 2.7 Signaling Specifications 26
- 2.7.1 FSB Signal Groups 27
- 28 Datasheet 28
- Datasheet 29 29
- 30 Datasheet 30
- 2.7.4 Clock Specifications 31
- 32 Datasheet 32
- Datasheet 33 33
- VHavg (mV) 34
- 250 + 0.5 (VHavg - 700) 34
- 550 + 0.5 (VHavg - 700) 34
- 2.8 PECI DC Specifications 35
- 36 Datasheet 36
- 3 Package Mechanical 37
- 38 Datasheet 38
- Datasheet 39 39
- 40 Datasheet 40
- INTEL ©'05 E6850 42
- INTEL® CORE™2 DUO 42
- SLxxx [COO] 42
- 3.00GHZ/4M/1333/06 42
- Datasheet 43 43
- INTEL ©'05 E4500 44
- 2.20GHZ/2M/800/06 44
- Preliminary 45
- Socket 775 45
- Quadrants 45
- Top View 45
- 46 Datasheet 46
- 4 Land Listing and Signal 47
- Descriptions 47
- 48 Datasheet 48
- Datasheet 49 49
- Table 24. Alphabetical Land 50
- Assignments 50
- Table 25. Numerical Land 60
- Assignment 60
- 70 Datasheet 70
- Datasheet 71 71
- 72 Datasheet 72
- Datasheet 73 73
- 74 Datasheet 74
- Datasheet 75 75
- 76 Datasheet 76
- Datasheet 77 77
- 78 Datasheet 78
- 5 Thermal Specifications and 79
- Design Considerations 79
- 80 Datasheet 80
- Datasheet 81 81
- 82 Datasheet 82
- Datasheet 83 83
- 84 Datasheet 84
- Datasheet 85 85
- 86 Datasheet 86
- 5.2.2 Thermal Monitor 2 87
- 88 Datasheet 88
- 5.2.4 PROCHOT# Signal 89
- 5.2.5 THERMTRIP# Signal 89
- 5.3 Thermal Diode 90
- Datasheet 91 91
- PECI Host 92
- Controller 92
- Domain 0 92
- Datasheet 93 93
- 5.4.2.1 PECI Device Address 94
- 5.4.2.2 PECI Command Support 94
- 6 Features 95
- 6.2.2.1 HALT Powerdown State 96
- 6.2.3.1 Stop Grant State 97
- 6.3 Enhanced Intel 98
- SpeedStep 98
- Technology 98
- Datasheet 99 99
- Features 100
- 100 Datasheet 100
- Datasheet 101 101
- 7.1 Mechanical Specifications 102
- 7.2 Electrical Requirements 103
- 104 Datasheet 104
- 7.3 Thermal Specifications 105
- 106 Datasheet 106
- Datasheet 107 107
- 108 Datasheet 108
- Datasheet 109 109
- 110 Datasheet 110
- (BTX) Boxed Processor 111
- Specifications 111
- 8.1 Mechanical Specifications 112
- Datasheet 113 113
- 114 Datasheet 114
- Datasheet 115 115
- 8.2 Electrical Requirements 116
- (hatched area) 117
- 8.3 Thermal Specifications 118
- Datasheet 119 119
- 120 Datasheet 120
- 9 Debug Tools Specifications 121
- Debug Tools Specifications 122
- 122 Datasheet 122
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