Intel B80532PG0962M Datasheet Page 15

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Intel
®
Pentium
®
4 Processor on 0.13 Micron Process Datasheet 15
Electrical Specifications
Electrical Specifications 2
2.1 System Bus and GTLREF
Most Pentium 4 processor on 0.13 micron process system bus signals use Assisted Gunning
Transceiver Logic (AGTL+) signalling technology. As with the P6 family of microprocessors, this
signalling technology provides improved noise margins and reduced ringing through low voltage
swings and controlled edge rates. Like the Pentium 4 processor in the 478-pin package, the
termination voltage level for the Pentium 4 processor on 0.13 micron process AGTL+ signals is
V
CC
, which is the operating voltage of the processor core. The use of a termination voltage that is
determined by the processor core allows better voltage scaling on the system bus for the Pentium 4
processor on 0.13 micron process. Because of the speed improvements to data and address bus,
signal integrity and platform design methods have become more critical than with previous
processor families. Design guidelines for the Pentium
4 processor on 0.13 micron process system
bus are detailed in the appropriate platform design guide (refer to Table 1-1).
The AGTL+ inputs require a reference voltage (GTLREF) that is used by the receivers to determine
if a signal is a logical 0 or a logical 1. GTLREF must be generated on the system board.
Termination resistors are provided on the processor silicon and are terminated to its core voltage
(V
CC
). The Intel
®
875P chipset, Intel
®
865G/865GV/865PE/865P chipsets, Intel
®
850 chipset, and
the Intel
®
845 chipset also provide on-die termination. This eliminates the need to terminate the
bus on the system board for most AGTL+ signals. However, some AGTL+ signals do not include
on-die termination and must be terminated on the system board. For more information, refer to the
appropriate platform design guide.
The AGTL+ bus depends on incident wave switching. Therefore, timing calculations for AGTL+
signals are based on flight time as opposed to capacitive deratings. Analog signal simulation of the
system bus, including trace lengths, is highly recommended when designing a system. For more
information, refer to the appropriate platform design guide.
2.2 Power and Ground Pins
For clean on-chip power distribution, the Pentium 4 processor on 0.13 micron process has 85 VCC
(power) and 180 VSS
(ground) inputs. All power pins must be connected to V
CC
, while all V
SS
pins must be connected to a system ground plane.The processor VCC pins must be supplied with
the voltage defined by the VID (Voltage ID) pins and the loadline specifications (see Figure 2-4).
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