Intel S5500HCVR Datasheet download pdf (Page 63)

Intel® Server Boards S5520HC and S5500HCV TPS Functional Architecture

Revision 1.2

Intel order number E39529-009

3.7 Baseboard Management Controller

The Intel

Server Boards S5520HC and S5500HCV have an integrated BMC controller based

on ServerEngines* Pilot II. The BMC controller is provided by an embedded ARM9 controller

and associated peripheral functionality that is required for IPMI-based server management.

The following is a summary of the BMC management hardware features used by the BMC:

 250 MHz 32-bit ARM9 Processor

 Memory Management Unit (MMU)

 Two 10/100 Ethernet Controllers with NC-SI support

 16-bit DDR2 667 MHz interface

 Dedicated RTC

 12 10-bit ADCs

 Eight Fan Tachometers

 Four PWMs

 Battery-backed Chassis Intrusion I/O Register

 JTAG Master

 Six I

C interfaces

 General-purpose I/O Ports (16 direct, 64 serial)

Additionally, the BMC integrates a super I/O module with the following features:

 Keyboard style/BT interface

 Two 16550-compatible serial ports

 Serial IRQ support

 16 GPIO ports (shared with the BMC)

 LPC to SPI bridge for system BIOS support

 SMI and PME support

The BMC also contains an integrated KVMS subsystem and graphics controller with the

following features:

 USB 2.0 for Keyboard, Mouse, and Storage devices

 USB 1.1 interface for legacy PS/2 to USB bridging.

 Hardware Video Compression for text and graphics

 Hardware encryption

 2D Graphics Acceleration

 DDR2 graphics memory interface

 Up to 1600x1200 pixel resolution

 PCI Express* x1 support

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Intel S5500HCVR Datasheet Page 63