Intel S5500HCVR Datasheet Page 146

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Design and Environmental Specifications Intel® Server Board S5520HC / S5500HCV TPS
Revision 1.2
Intel order number E39529-009
132
9.4.4 Voltage Regulation
The power supply output voltages must stay within the following voltage limits when operating at
steady state and dynamic loading conditions. These limits include the peak-peak ripple / noise.
All outputs are measured with reference to the return remote sense signal (ReturnS). The +12
V3, +12 V4, –12 V and 5 VSB outputs are measured at the power supply connectors referenced
to ReturnS. The +3.3 V, +5 V, +12 V1, and +12 V2 are measured at its remote sense signal
located at the signal connector.
Table 74. Voltage Regulation Limits
Parameter Tolerance Minimum Nominal Maximum Units
+3.3 V - 5% / +5% +3.14V +3.30V +3.46V V
rms
+5 V - 5% / +5% +4.75V +5.00V +5.25V
V
rms
+12 V 1 - 5% / +5% +11.40V +12.00V +12.60V
V
rms
+12 V 2 - 5% / +5% +11.40V +12.00V +12.60V
V
rms
+12 V 3 - 5% / +5% +11.40V +12.00V +12.60V
V
rms
+12 V 4 - 5% / +5% +11.40V +12.00V +12.60V
V
rms
- 12 V - 5% / +9% - 11.40V -12.00V -13.08V
V
rms
+5 VSB - 5% / +5% +4.75V +5.00V +5.25V
V
rms
9.4.5 Dynamic Loading
The output voltages remain within limits for the step loading and capacitive loading specified in
the following table. You should test the load transient repetition rate between 50 Hz and 5 kHz
at duty cycles ranging from 10% to 90%. The load transient repetition rate is only a test
specification. The step load may occur anywhere within the minimum load to the maximum
load range.
Table 75. Transient Load Requirements
Output
Step Load Size 1
Load Slew Rate Test Capacitive Load
+3.3 V 7.0 A
0.25A/sec 4700F
+5 V 7.0 A
0.25A/sec 1000F
+12 V 25 A
0.25A/sec 4700F
+5 VSB 0.5 A
0.25A/sec 20F
1. Step loads on each 12 V output may happen simultaneously.
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