Intel CM8063701450500 Datasheet download pdf (Page 57)

Datasheet, Volume 1 57

Power Management

4.3.2 DRAM Power Management and Initialization

The processor implements extensive support for power management on the SDRAM

interface. There are four SDRAM operations associated with the Clock Enable (CKE)

signals that the SDRAM controller supports. The processor drives four CKE pins to

perform these operations.

The CKE is one means of power saving. When CKE is off, the internal DDR clock is

disabled and the DDR power is reduced. The power-saving differs according to the

selected mode and the DDR type used. For more information, refer to the IDD table in

the DDR specificaiton.

The DDR defines 3 levels of power down that differ in power saving and in wakeup

time:

1. Active power down (APD): This mode is entered if there are open pages when de-

asserting CKE. In this mode the open pages are retained. Power-saving in this

mode is the lowest. Power consumption of DDR is defined by IDD3P. Exiting this

mode is defined by tXP – small number of cycles.

2. Precharged power down (PPD): This mode is entered if all banks in DDR are

precharged when de-asserting CKE. Power-saving in this mode is intermediate –

better than APD, but less than DLL-off. Power consumption is defined by IDD2P1.

Exiting this mode is defined by tXP. The difference relative to APD mode is that

when waking-up in PPD mode, all page-buffers are empty.

3. DLL-off: In this mode the data-in DLLs on DDR are off. Power-saving in this mode is

the best among all power modes. Power consumption is defined by IDD2P1. Exiting

this mode is defined by tXP and tXPDLL (10–20 according to the DDR type) until

first data transfer is allowed.

The processor supports 6 different types of power down. The different modes are the

power down modes supported by DDR3 and combinations of these. The type of CKE

power down is defined by configuration. The options are as follows:

1. No power down

2. APD: The rank enters power down as soon as the idle-timer expires, independent of

the bank status

3. PPD: When idle timer expires, the MC sends PRE-all to rank and then enters power

down

4. DLL-off: Same as option 2 but DDR is configured to DLL-off

5. APD, change to PPD (APD-PPD): Begins as option 1, and when all page-close timers

of the rank are expired, it wakes the rank, issues PRE-all, and returns to PPD.

6. APD, change to DLL-off (APD_DLLoff): Begins as option 1, and when all page-close

timers of the rank are expired, it wakes the rank, issues PRE-all, and returns to

DLL-off power down.

The CKE is determined per rank, when it is inactive. Each rank has an idle counter. The

idle counter starts counting as soon as the rank has no accesses, and if it expires, the

rank may enter power down while no new transactions to the rank arrive to queues.

The idle counter begins counting at the last incoming transaction arrival.

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Intel CM8063701450500 Datasheet Page 57

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