Signal Description
68 Datasheet, Volume 1
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2nd Generation Intel
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Processor Family Desktop
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2 Datasheet, Volume 1
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Contents
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4 Datasheet, Volume 1
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Datasheet, Volume 1 5
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6 Datasheet, Volume 1
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Datasheet, Volume 1 7
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Revision History
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1 Introduction
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Processor
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1.1 Processor Feature Details
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1.2 Interfaces
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1.2.2 PCI Express*
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Datasheet, Volume 1 13
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Introduction
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1.2.5 Processor Graphics
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1.2.6 Intel
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1.3 Power Management Support
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1.5 Package
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1.6 Terminology
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1.7 Related Documents
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2 Interfaces
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Interfaces
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2.1.3.1 Single-Channel Mode
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Flex Memory Technology Mode
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Fast Memory Access
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2.1.5.2 Command Overlap
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2.2 PCI Express* Interface
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2.2.1.1 Transaction Layer
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2.2.1.2 Data Link Layer
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2.2.1.3 Physical Layer
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2.2.3 PCI Express* Port
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2.3.1 DMI Error Flow
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2.3.3 DMI Link Down
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2.4.1.2 3D Pipeline
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2.4.1.3 Video Engine
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2.4.1.4 2D Engine
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2.4.2.1 Display Planes
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2.4.2.2 Display Pipes
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2.4.2.3 Display Ports
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2.6 Interface Clocking
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3 Technologies
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3.1.2 Intel
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VT-x Features
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3.1.3 Intel
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VT-d Objectives
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3.1.4 Intel
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VT-d Features
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3.1.5 Intel
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VT-d Features Not Supported
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3.2 Intel
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3.3 Intel
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Hyper-Threading Technology
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3.4 Intel
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Turbo Boost Technology
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3.5 Intel
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(AES-NI)
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3.7 Intel
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64 Architecture x2APIC
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Technologies
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4 Power Management
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4.1.4 PCIe Link States
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4.1.5 DMI States
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4.2.1 Enhanced Intel
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SpeedStep
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Technology
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4.2.2 Low-Power Idle States
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4.2.4.1 Core C0 State
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4.2.4.2 Core C1/C1E State
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4.2.4.3 Core C3 State
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4.2.4.4 Core C6 State
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4.2.4.5 C-State Auto-Demotion
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4.2.5 Package C-States
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4.2.5.1 Package C0
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4.2.5.2 Package C1/C1E
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4.2.5.3 Package C3 State
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4.2.5.4 Package C6 State
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4.3 IMC Power Management
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Datasheet, Volume 1 53
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Power Management
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4.4 PCIe* Power Management
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4.5 DMI Power Management
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4.6 Graphics Power Management
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4.7 Thermal Power Management
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5 Thermal Management
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Thermal Management
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6 Signal Description
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6.1 System Memory Interface
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Table 6-3. Memory Channel B
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6.5 Intel
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6.7 PLL Signals
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6.8 TAP Signals
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6.10 Power Sequencing
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6.11 Processor Power Signals
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6.12 Sense Pins
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6.13 Ground and NCTF
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Signal Description
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7 Electrical Specifications
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Voltage Identification (VID)
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Electrical Specifications
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7.5 System Agent (SA) VCC VID
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7.7 Signal Groups
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7.10 DC Specifications
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(Sheet 2 of 2)
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Specifications
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DC Specifications
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7.11.2 DC Characteristics
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8 Processor Pin and Signal
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88 Datasheet, Volume 1
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Datasheet, Volume 1 89
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90 Datasheet, Volume 1
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Datasheet, Volume 1 91
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106 Datasheet, Volume 1
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9 DDR Data Swizzling
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Table – Channel A
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Table – Channle B
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DDR Data Swizzling
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