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Intel BX80623I72600K Datasheet Page 106
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Processor Pi
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nformation
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Datasheet, Volume 1
1
2
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2nd Generation Intel
1
Processor Family Desktop
1
2 Datasheet, Volume 1
2
Contents
3
4 Datasheet, Volume 1
4
Datasheet, Volume 1 5
5
6 Datasheet, Volume 1
6
Datasheet, Volume 1 7
7
Revision History
8
1 Introduction
9
Processor
10
1.1 Processor Feature Details
11
1.2 Interfaces
11
1.2.2 PCI Express*
12
Datasheet, Volume 1 13
13
Introduction
13
1.2.5 Processor Graphics
14
1.2.6 Intel
14
1.3 Power Management Support
15
1.5 Package
16
1.6 Terminology
16
1.7 Related Documents
18
2 Interfaces
19
Interfaces
20
2.1.3.1 Single-Channel Mode
21
Flex Memory Technology Mode
21
Fast Memory Access
22
2.1.5.2 Command Overlap
23
2.2 PCI Express* Interface
24
2.2.1.1 Transaction Layer
25
2.2.1.2 Data Link Layer
25
2.2.1.3 Physical Layer
25
2.2.3 PCI Express* Port
26
2.3.1 DMI Error Flow
27
2.3.3 DMI Link Down
28
2.4.1.2 3D Pipeline
29
2.4.1.3 Video Engine
30
2.4.1.4 2D Engine
30
2.4.2.1 Display Planes
31
2.4.2.2 Display Pipes
32
2.4.2.3 Display Ports
32
2.6 Interface Clocking
33
3 Technologies
35
3.1.2 Intel
36
VT-x Features
36
3.1.3 Intel
36
VT-d Objectives
36
3.1.4 Intel
37
VT-d Features
37
3.1.5 Intel
37
VT-d Features Not Supported
37
3.2 Intel
38
3.3 Intel
38
Hyper-Threading Technology
38
3.4 Intel
39
Turbo Boost Technology
39
3.5 Intel
40
(AES-NI)
40
3.7 Intel
41
64 Architecture x2APIC
41
Technologies
42
4 Power Management
43
4.1.4 PCIe Link States
44
4.1.5 DMI States
44
4.2.1 Enhanced Intel
45
SpeedStep
45
Technology
45
4.2.2 Low-Power Idle States
46
4.2.4.1 Core C0 State
48
4.2.4.2 Core C1/C1E State
48
4.2.4.3 Core C3 State
48
4.2.4.4 Core C6 State
48
4.2.4.5 C-State Auto-Demotion
48
4.2.5 Package C-States
49
4.2.5.1 Package C0
50
4.2.5.2 Package C1/C1E
51
4.2.5.3 Package C3 State
51
4.2.5.4 Package C6 State
51
4.3 IMC Power Management
52
Datasheet, Volume 1 53
53
Power Management
53
4.4 PCIe* Power Management
54
4.5 DMI Power Management
55
4.6 Graphics Power Management
55
4.7 Thermal Power Management
56
5 Thermal Management
57
Thermal Management
58
6 Signal Description
59
6.1 System Memory Interface
60
Table 6-3. Memory Channel B
61
6.5 Intel
63
6.7 PLL Signals
64
6.8 TAP Signals
64
6.10 Power Sequencing
65
6.11 Processor Power Signals
66
6.12 Sense Pins
66
6.13 Ground and NCTF
66
Signal Description
68
7 Electrical Specifications
69
Voltage Identification (VID)
70
Electrical Specifications
72
7.5 System Agent (SA) VCC VID
74
7.7 Signal Groups
75
7.10 DC Specifications
78
(Sheet 2 of 2)
79
Specifications
80
DC Specifications
84
7.11.2 DC Characteristics
85
8 Processor Pin and Signal
87
88 Datasheet, Volume 1
88
Datasheet, Volume 1 89
89
90 Datasheet, Volume 1
90
Datasheet, Volume 1 91
91
106 Datasheet, Volume 1
106
9 DDR Data Swizzling
107
Table – Channel A
108
Table – Channle B
109
DDR Data Swizzling
110
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