Intel ARCHITECTURE IA-32 User Manual download pdf (Page 398)

100

101

IA-32 Intel® Architecture Optimization

7-52

Arrangements of affinity-binding can benefit performance more than

other arrangements. This applies to:

• Scheduling two domain-decomposition threads to use separate cores

or physical packages in order to avoid contention of execution

resources in the same core

• Scheduling two functional-decomposition threads to use shared

execution resources cooperatively

• Scheduling pairs of memory-intensive threads and

compute-intensive threads to maximize processor scaling and avoid

resource contentions in the same core

An example using the 3-level hierarchy and relationships between the

initial APIC_ID and the affinity mask to manage thread affinity binding

is shown in Example 7-12. The example shows an implementation of

building a lookup table so that the sequence of thread scheduling is

mapped to an array of affinity masks such that threads are scheduled

if (ThreadAffinityMask & SystemAffinity){

Set thread to run on the processor specified in ThreadAffinityMask.

Wait if necessary and ensure thread is running on specified processor.

apic_conf[ProcessorNum].initialAPIC_ID = GetInitialAPIC_ID();

Extract the Package, Core and SMT ID as explained in three

level extraction algorithm.

apic_conf[ProcessorNum].pkg = PACKAGE_ID;

apic_conf[ProcessorNum].core = CORE_ID;

apic_conf[ProcessorNum].smt = SMT_ID;

apic_conf[ProcessorNum].affinity_mask = ThreadAffinityMask;

ProcessorNum++;

}

ThreadAffinityMask <<= 1;

}

NumStartedLPs = ProcessorNum;

Example 7-11 Assembling 3-level IDs, Affinity Masks for Each Logical

Processor (Contd.)

1 2 ... 393 394 395 396 397 398 399 400 401 402 403 ... 567 568

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