Intel ARCHITECTURE IA-32 User Manual download pdf (Page 456)

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101

IA-32 Intel® Architecture Optimization

B-2

The performance metrics listed n Tables B-1 through Table B-5 may be

applicable to processors that support Hyper-Threading Technology, see

Using Performance Metrics with Hyper-Threading Technology section.

Pentium 4 Processor-Specific Terminology

Bogus, Non-bogus, Retire

Branch mispredictions incur a large penalty on microprocessors with

deep pipelines. In general, the direction of branches can be predicted

with a high degree of accuracy by the front end of the Intel Pentium 4

processor, such that most computations can be performed along the

predicted path while waiting for the resolution of the branch.

In the event of a misprediction, instructions and micro-ops (

μops) that

were scheduled to execute along the mispredicted path must be

cancelled. These instructions and

μops are referred to as bogus

instructions and bogus

μops. A number of Pentium 4 processor

performance monitoring events, for example,

instruction_ retired

and

mops_retired, can count instructions or μops that are retired based

on the characterization of bogus versus non-bogus.

In the event descriptions in Table B-1, the term “bogus” refers to

instructions or micro-ops that must be cancelled because they are on a

path taken from a mispredicted branch. The terms “retired” and

“non-bogus” refer to instructions or micro-ops along the path that

results in committed architectural state changes as required by the

program execution. Thus instructions and

μops are either bogus or

non-bogus, but not both.

Bus Ratio

Bus Ratio is the ratio of the processor clock to the bus clock. In the Bus

Utilization metric, it is the Bus_ratio.

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