Intel DBS2400GP2 Datasheet download pdf (Page 38)

Functional Architecture Intel

Server Board S2400GP TPS

Revision 1.01

Intel order number G50295-002

 Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel

. If

1.35V (DDR3L) and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.

 Mixing of DDR3 operating frequencies is not validated within a socket or across sockets

by Intel

. If DIMMs with different frequencies are mixed, all DIMMs will run at the

common lowest frequency.

 A maximum of eight logical ranks (ranks seen by the host) per channel is allowed.

 Mixing of ECC and non-ECC DIMMs is not allowed per platform.

 DIMMs with different timing parameters can be installed on different slots within the same

channel, but only timings that support the slowest DIMM will be applied to all. As a

consequence, faster DIMMs will be operated at timings supported by the slowest DIMM

populated.

 When one DIMM is used, it must be populated in the BLUE DIMM slot (farthest away

from the CPU) of a given channel.

 When single, dual and quad rank DIMMs are populated for 2DPC, always populate the

higher number rank DIMM first (starting from the farthest slot), for example, first quad

rank, then dual rank, and last single rank DIMM.

DIMM population rules require that DIMMs within a channel be populated starting with the BLUE

DIMM slot or DIMM farthest from the processor in a “fill-farthest” approach. In addition, when

populating a Quad-rank DIMM with a Single- or Dual-rank DIMM in the same channel, the

Quad-rank DIMM must be populated farthest from the processor. Intel

MRC will check for

correct DIMM placement.

3.6.3 Publishing System Memory

 The BIOS displays the “Total Memory” of the system during POST if Display Logo is

disabled in the BIOS setup. This is the total size of memory discovered by the BIOS

during POST, and is the sum of the individual sizes of installed DDR3 DIMMs in

the system.

 The BIOS displays the “Effective Memory” of the system in the BIOS setup. The term

Effective Memory refers to the total size of all DDR3 DIMMs that are active (not disabled)

and not used as redundant units.

 The BIOS provides the total memory of the system in the main page of the BIOS setup.

This total is the same as the amount described by the first bullet above.

 If Display Logo is disabled, the BIOS displays the total system memory on the diagnostic

screen at the end of POST. This total is the same as the amount described by the first

bullet above.

Note: Some server operating systems do not display the total physical memory installed.

What is displayed is the amount of physical memory minus the approximate memory space

used by system BIOS components. These BIOS components include, but are not limited to:

 ACPI (may vary depending on the number of PCI devices detected in the system)

 ACPI NVS table

 Processor microcode

 Memory Mapped I/O (MMIO)

 Manageability Engine (ME)

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Intel DBS2400GP2 Datasheet Page 38

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