Intel 386 User Manual download pdf (Page 604)

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101

D-39

SYSTEM REGISTER QUICK REFERENCE

D.36 MSR

Modem Status

MSR0, MSR1

(read only)

Expanded Addr:

ISA Addr:

Reset State:

MSR0 MSR1

F4FEH F8FEH

03FEH 02FEH

X0H X0H

7 0

DCD RI DSR CTS DDCD TERI DDSR DCTS

Bit

Number

Bit

Mnemonic

Function

7 DCD Data Carrier Detect:

This bit is the complement of the data carrier detect (DCD

#) input. In

diagnostic test mode, this bit is equivalent to MCR

.3 (OUT2).

6 RI Ring Indicator:

This bit is the complement of the ring indicator (RI

#) input. In diagnostic

test mode, this bit is equivalent to MCR

.2 (OUT1).

5 DSR Data Set Ready:

This bit is the complement of the data set ready (DSR

#) input. In

diagnostic test mode, this bit is equivalent to MCR

.0 (DTR).

4 CTS Clear to Send:

This bit is the complement of the clear to send (CTS

#) input. In

diagnostic test mode, this bit is equivalent to MCR

.1 (RTS).

3 DDCD Delta Data Carrier Detect:

When set, this bit indicates that the DCD

# input has changed state

since the last time this register was read. Reading this register clears

this bit.

2 TERI Trailing Edge Ring Indicator:

When set, this bit indicates that the RI

# input has changed from a low

to a high state since the last time this register was read. Reading this

1 DDSR Delta Data Set Ready:

When set, this bit indicates that the DSR

# input has changed state

since the last time this register was read. Reading this register clears

this bit.

0 DCTS Delta Clear to Send:

When set, this bit indicates that the CTS

# input has changed state

since the last time this register was read. Reading this register clears

this bit.

1 2 ... 599 600 601 602 603 604 605 606 607 608 609 ... 690 691

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Intel 386 User Manual Page 604

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