Intel S3420GP User Manual

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Intel Server Board S3420
®
GP
Technical Product Specification
Intel order numbe
Revision 1.0
August 2009
Enterprise Platforms and Services Division
r E65697-003
Page view 0
1 2 3 4 5 6 ... 135 136

Summary of Contents

Page 1 - Intel Server Board S3420

Intel Server Board S3420®GP Technical Product Specification Intel order numbeRevision 1.0 August 2009Enterprise Platforms and Services Division

Page 2 - Revision History

List of Tables IntelP®P Server Board S3420GP TPS List of Tables Table 1. Intel® Server Board S3420GP Feature Set ...

Page 3 - Disclaimers

Design and Environmental Specifications IntelP®P Server Board S3420GP TPS 9. Design and Environmental Specifications 9.1 Intel® Server Board S3420GP

Page 4 - Table of Contents

IntelP®P Server Board S3420GP TPS Design and Environmental Specifications 9.3 Server Board Power Requirements This section provides power supply des

Page 5

Design and Environmental Specifications IntelP®P Server Board S3420GP TPS 9.3.1 Processor Power Support The server board supports the Thermal Design

Page 6

IntelP®P Server Board S3420GP TPS Design and Environmental Specifications 9.4.1 Grounding The grounds of the power supply output connector pins pro

Page 7

Design and Environmental Specifications IntelP®P Server Board S3420GP TPS +5 VSB 0.5 A 0.25 A/µsec 20 µF Notes: 1. Step loads on each 12 V output

Page 8 - List of Figures

IntelP®P Server Board S3420GP TPS Design and Environmental Specifications  The output voltages must rise from 10% to within regulation limits (Tv

Page 9

Design and Environmental Specifications IntelP®P Server Board S3420GP TPS Table 63. Turn On/Off Timing Item Description Minimum Maximum Units Tsb

Page 10 - List of Tables

IntelP®P Server Board S3420GP TPS Design and Environmental Specifications 9.4.11 Residual Voltage Immunity in Standby Mode The power supply is imm

Page 11

Design and Environmental Specifications IntelP®P Server Board S3420GP TPS +5 V 5.7 6.2 +12 V 13.3 14.5 -12 V -13.3 -14.5 +5 VSB 5.7 6.5 Rev

Page 12

IntelP®P Server Board S3420GP TPS Regulatory and Certification Information 10. Regulatory and Certification Information 10.1 Product Regulatory Co

Page 13

IntelP®P Server Board S3420GP TPS List of Tables Table 33. SSI Processor Power Connector Pin-out (J9C1) ...

Page 14 - 1. Introduction

Regulatory and Certification Information IntelP®P Server Board S3420GP TPS  FCC/ICES-003 Class A Attestation (USA/Canada)  C-Tick Declaration of

Page 15 - 2. Overview

IntelP®P Server Board S3420GP TPS Regulatory and Certification Information Revision 1.0 Intel order number E65697-003 9710.2 Product Regulatory

Page 16

Regulatory and Certification Information IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 98 Other Recycling Package Ma

Page 17 - 2.2 Server Board Layout

IntelP®P Serv 10.3 10.3.1 This device complies with Part 15 of the FCC Rules. Operation is subject to two conditions: (1) This device may not cause h

Page 18 - AF003290

Regulatory 100 10.3.2 ICES-003 Cet appareil numérique respecte les limites bruits radioélectriques applicables aux appareils numériques de Classe B

Page 19

IntelP®P Serv 10.3.5 BSMI The BSMI Certification Marking and EMC warning is located on the outside rear area of the product. 10.3.6 RRL Following is

Page 20 - 2.2.2 Intel

Appendix A: Integration and Usage Tips 102 IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 Appendix A: Integration and

Page 21

IntelP®P Server Board S3420GP TPS Appendix B: Integrated BMC Sensor Tables Appendix B: Integrated BMC Sensor Tables This appendix lists the sensor id

Page 22

Appendix B: Integrated BMC Sensor Tables IntelP®P Server Board S3420GP TPS  Rearm Sensors The rearm is a request for the event status for a sensor

Page 23

IntelP®P Server Board S3420GP TPS Appendix B: Integrated BMC Sensor Tables Revision 1.0 Intel order number E65697-003 105Table 66. Integrated BMC

Page 24

List of Tables IntelP®P Server Board S3420GP TPS Table 67. POST Progress Code LED Example ...

Page 25

Appendix B: Integrated BMC Sensor Tables106 IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 Sensor Name3Sensor # Plat

Page 26 - Server Board Rear I/O Layout

IntelP®P Server Board S3420GP TPS Appendix B: Integrated BMC Sensor Tables Revision 1.0 Intel order number E65697-003 107Sensor Name3Sensor # Pla

Page 27 - 3 nct. Fu ional Architecture

Appendix B: Integrated BMC Sensor Tables108 IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 Sensor Name3Sensor # Plat

Page 28 - Processor

IntelP®P Server Board S3420GP TPS Appendix C: POST Code Diagnostic LED Decoder Appendix C: POST Code Diagnostic LED Decoder During the system boot pr

Page 29 - 3.2 Memory Subsystem

Appendix C: POST Code Diagnostic LED Decoder IntelP®P Server Board S3420GP TPS MSB LSB8h 4h

Page 30 - 3.2.2 Post Error Codes

IntelP®P Server Board S3420GP TPS Appendix C: POST Code Diagnostic LED Decoder Diagnostic LED Decoder O = On, X=Off Upper Nibble Lower Nibble MSB

Page 31 - 3 Publishing System Memory

Appendix C: POST Code Diagnostic LED Decoder IntelP®P Server Board S3420GP TPS Diagnostic LED Decoder O =

Page 32 - 3.2.4 Support for Mi

IntelP®P Server Board S3420GP TPS Appendix D: POST Code Errors Appendix D: POST Code Errors Whenever possible, the BIOS outputs the current boot pro

Page 33

Appendix D: POST Code Errors IntelP®P Server Board S3420GP TPS Error Code Error Message Response 8111

Page 34

IntelP®P Server Board S3420GP TPS Appendix D: POST Code Errors Error Code Error Message Response 8549 DIMM_C2 Disabled. Pause 854A DIMM_C3 Dis

Page 35 - -system

IntelP®P Server Board S3420GP TPS List of Tables <This page intentionally left blank.> Revision 1.0 Intel order number E65697-003 xiii

Page 36 - 3.4.3 USB 2.0 Support

Appendix D: POST Code Errors IntelP®P Server Board S3420GP TPS Error Code Error Message Response 85A7

Page 37 - Intel D Module AXX4SASMOD

IntelP®P Server Board S3420GP TPS Appendix D: POST Code Errors Error Code Error Message Response 0xA500 ATA/ATPI ATA bus SMART not supported. No

Page 38

Appendix E: Supported IntelP®P Server Chassis IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 118 Appendix E: Supporte

Page 39 - Integrated BMC Block Diagram

IntelP®P Server Board S3420GP TPS Glossary Revision 1.0 Intel order number E65697-003 119Glossary This appendix contains important terms used in

Page 40 - Keyboard and Mouse Support

Glossary IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 120 Term Definition ICH I/O Controller Hub ICMB Intelligen

Page 41 - Video Support

IntelP®P Server Board S3420GP TPS Glossary Revision 1.0 Intel order number E65697-003 121Term Definition PSMI Power Supply Management Interface

Page 42 - Network Interface Contro

Reference Documents IntelP®P Server Board S3420GP TPS Revision 1.0 Intel order number E65697-003 122 Reference Documents Refer to the following do

Page 43 - Direct Cache Access (DCA)

Introduction IntelP®P Server Board S3420GP TPS 1. Introduction This Technical Product Specification (TPS) provides board specific information detail

Page 44 - 4. Platform Management

IntelP®P Server Board S3420GP TPS Overview 2. Overview The Intel® Server Board S3420GP is a monolithic printed circuit board (PCB) with features desi

Page 45 - 4.1.2 Non-IPMI Features

Overview IntelP®P Server Board S3420GP TPS Feature Description Add-in PCI Card, PCI Express* Card • Intel® Server Board S3420GPLX  Slot1: One 5

Page 46 - Revision 1.0

IntelP®P Server Board S3420GP TPS Overview 2.2 Server Board Layout Figure 1. Intel® Server Board S3420GPLX Picture Revision 1.0 Intel order number

Page 47 - 4.2.3 Media Redirection

Overview IntelP®P Server Board S3420GP TPS 2.2.1 Server Board Connector and Component Layout The following figure shows the board layout of the ser

Page 48 - 4.2.6 Embedde

IntelP®P Server Board S3420GP TPS Overview Table 2. Major Board Components Description Description A Slot 1, 32 Mbit/33 MHz PCI Q System FAN2

Page 49 - 5. BIOS User Interface

Revision History IntelP®P Server Board S3420GP TPS Revision History Date Revision Number Modifications Feb. 2009 0.3 Initial version May 2009 0.5

Page 50

Overview IntelP®P Server Board S3420GP TPS 2.2.2 Intel® Server Board S3420GP Mechanical Drawings Figure 3. Intel® Server Board S3420GP – Key Conne

Page 51

IntelP®P Server Board S3420GP TPS Overview Figure 4. Intel® Server Board S3420GP – Hole and Component Positions Revision 1.0 Intel order number E6

Page 52 - Server Pla U

Overview IntelP®P Server Board S3420GP TPS Figure 5. Intel® Server Board S3420GP – Major Connector Pin Location (1 of 2) Revision 1.0 Intel order

Page 53

IntelP®P Server Board S3420GP TPS Overview Figure 6. Intel® Server Board S3420GP –Major Connector Pin Location (2 of 2) Revision 1.0 Intel order num

Page 54

Overview IntelP®P Server Board S3420GP TPS Figure 7. Intel® Server Board S3420GP – Primary Side Keepout Zone Revision 1.0 Intel order number E6569

Page 55

IntelP®P Server Board S3420GP TPS Overview Figure 8. Intel® Server Board S3420GP – Secondary Side Keepout Zone Revision 1.0 Intel order number E6569

Page 56 -

Overview IntelP®P Server Board S3420GP TPS 2.2.3 lowing f t of the rear I/O components for the server board. Server Board Rear I/O Layout The fol igu

Page 57

IntelP®P Server Board S3420GP TPS Functional Architecture 3 nct. Fu ional Architecture The architecture and design of the Intel® Server Board S3420GP

Page 58

Functional Architecture IntelP®P Server Board S3420GP TPS 612FLASHFLASHLPCSERIAL 1SATA-IIPCI32 6 onboard9.6" S3420GPLC Block DiagramATX - 12&quo

Page 59

IntelP®P Server Board S3420GP TPS Functional Architecture The server3.1.2 Intel Turbo Boost Technology Inte Boost certain processors in the Intel

Page 60

IntelP®P Server Board S3420GP TPS Disclaimers Disclaimers Information in this document is provided in connection with Intel® products. No license, ex

Page 61

Functional Architecture IntelP®P Server Board S3420GP TPS frequency can be 1066/1333 MHz. All RDIMMs and UDIMMs include ECC (Error Correction Code) o

Page 62

IntelP®P Server Board S3420GP TPS Functional Architecture Memory BIST, the system acts as if no memory is available, beeping and halting with itial

Page 63

Functional Architecture IntelP®P Server Board S3420GP TPS offered by the Intel® S3420 I/O Hub and a variably-sized Memory Mapped I/O region for the P

Page 64

IntelP®P Server Board S3420GP TPS Functional Architecture 3.2.5.1 TableMemory Subsystem Operating Frequency DeterminatThe rules for determining the

Page 65

Functional Architecture IntelP®P Server Board S3420GP TPS You must observe the following general rules when selecting and configuring memory to obtai

Page 66

IntelP®P Server Board S3420GP TPS Functional Architecture 3.3 Intel® 3420 Chipset PCH The Intel® 3420 Chipset component is the Platform Controller Hu

Page 67

Functional Architecture IntelP®P Server Board S3420GP TPS When operating with two PCI Express* controllers, each controller can operate at either 2.5

Page 68

IntelP®P Server Board S3420GP TPS Functional Architecture The BIOS supports USB 2.0 mode of operation, and as such supports USB 1.1 and USB 2.0 re-bo

Page 69

Functional Architecture IntelP®P Server Board S3420GP TPS  12 10-bit ADCs  Eight Fan Tachometers  Four PWMs  JTAG Master 50 Serial Ports 

Page 70

IntelP®P Server Board S3420GP TPS Functional Architecture ARM926EJ-S16K D & I CacheInterruptControllerFan Tach (12) PWM (4)ADCThermalUSB 1.1 &a

Page 71

Table of Contents IntelP®P Server Board S3420GP TPS Table of Contents 1. Introduction ...

Page 72

Functional Architecture IntelP®P Server Board S3420GP TPS • Give the customer the option to add a dedicathe product. ted management 100 Mbit LAN in

Page 73

IntelP®P Server Board S3420GP TPS Functional Architecture 3.6.6 The super I/O contains functionality that allows various events to power on and power

Page 74

Functional Architecture IntelP®P Server Board S3420GP TPS Onboard Video Enabled Disabled Onboard video controller. Warning: System video is completel

Page 75

IntelP®P Server Board S3420GP TPS Functional Architecture  NIC 2 MAC address – Assigned the NIC 1 MAC address +1 g three MAC addresses assigned to

Page 76

Platform Management IntelP®P Server Board S3420GP TPS 4. Platform Management The platform management subsystem is based on the Integrated BMC feature

Page 77 - 5.4 Loading BIOS Defaults

IntelP®P Server Board S3420GP TPS Platform Management  ccess to a SEL. System event log (SEL) device functionality: The Integrated BMC supports and

Page 78

Platform Management IntelP®P Server Board S3420GP TPS  Power unit management: Support for power unit sensor. The Integrated Baseboard anagement Con

Page 79 - 6.2 Power Connectors

IntelP®P Server Board S3420GP TPS Platform Management 4.2.2.3 AvailaUp to two remote KVM sessions are supported. The default inactivity timeout is 30

Page 80 - RMM3) Connector

Platform Management IntelP®P Server Board S3420GP TPS 4.2.4 Web Services for Management (WS-MAN) hentication Protocol (LDAP) l for us ords and sessi

Page 81

IntelP®P Server Board S3420GP TPS BIOS User Interface 5. BIOS User Interface 5.1 n The ostic Screen displays in oot is enabled in the BIOS setup, a

Page 82 - 6.4.1 Power Button

IntelP®P Server Board S3420GP TPS Table of Contents 3.6.5 Keyboard and Mouse Support ...

Page 83

BIOS User Interface IntelP®P Server Board S3420GP TPS z Localization - The BIOS Setup uses the Unicode standard and is capable of displaying setup f

Page 84

IntelP®P Server Board S3420GP TPS BIOS User Interface Table 10. BIOS Setup: Keyboard Command Bar Key Option Description <Enter> Execute The

Page 85 - 6.5 I/O Connectors

BIOS User Interface IntelP®P Server Board S3420GP TPS 5.3.1.4 Menu Selection Bar The Menu Selection Bar is located at the top of the BIOS Setup Util

Page 86 - 6.5.4 SAS Connectors

IntelP®P Server Board S3420GP TPS BIOS User Interface Main Advanced Security Server Management Boot Options Boot Manager Logged in as <Admini

Page 87 - 6.5.6 USB Connector

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments Size Informatotal phythe syste physical l memoryins

Page 88

IntelP®P Server Board S3420GP TPS BIOS User Interface Main Advanced Sec rity u Server Management Boot Options Boot Manager ► Processor Configurati

Page 89

BIOS User Interface IntelP®P Server Board S3420GP TPS Advanced Processor Configuration Processor Socket CPU 1 Processor ID <CPUID&

Page 90

IntelP®P Server Board S3420GP TPS BIOS User Interface Setup Item Options Help Text Comments Microcode Revision ion of Information only. Revist

Page 91

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments Coherency Support Enable/Disable Intel® VT-d Cohere

Page 92 - One PCI X32 connector (J1B1)

IntelP®P Server Board S3420GP TPS BIOS User Interface Advanced Memory Configuration Total Memory <Total Physical Memory Installed in System&

Page 93 - 6.7 Fan Headers

Table of Contents IntelP®P Server Board S3420GP TPS 6.3.1 Intel® Remote Management Module 3 (Intel® RMM3) Connector ... 66 6

Page 94 - 7. Jumper Blocks

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Comments Current Memooryry Information only. Displays the speed the memSpeed is ru

Page 95 - 7.1.2 Clearing the Password

IntelP®P Server Board S3420GP TPS BIOS User Interface Setup Item Options Help Text Comments Intel AID Enabled or Disable the Intel® SAS Unavaila

Page 96 - 7.3 ME Force Update Jumper

BIOS User Interface IntelP®P Server Board S3420GP TPS Advanced Serial Port Configuration Enabled/Disabled Serial A Enable s 3F8h / 2F8h / 3E8h /

Page 97 - 7.4 BIOS Recovery Jumper

IntelP®P Server Board S3420GP TPS BIOS User Interface Advanced USB Configuration Detected USB Devices <Total USB Devices in System>

Page 98 - Light Guided Diagnostics

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments Device timeout 20 sec 30 sec 40 sec Storag t. Setting

Page 99

IntelP®P Server Board S3420GP TPS BIOS User Interface Table 18. Setup Utility – PCI Configuration Screen Fields Setup Item Options Help Text Comme

Page 100 - 9.1 Intel

BIOS User Interface IntelP®P Server Board S3420GP TPS Advanced System Acoust rforic and Pe mance Configuration Set Throttling Mode Auto / CLTT

Page 101 - Revision 1.0

IntelP®P Server Board S3420GP TPS BIOS User Interface Setup Item Options Help Text Comments Set Fan Profile Performance Acoustic[Performance] - Fa

Page 102

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments SPasswet Administrator [123aBcD] d i used to control

Page 103 - 9.4.5 Dynamic Loading

IntelP®P Server Board S3420GP TPS BIOS User Interface Main Advanced Security Server Management Boot Options Boot Manager Assert NMI on SERR Enab

Page 104 - 9.4.10 Timing Requirements

IntelP®P Server Board S3420GP TPS Table of Contents 9.4.2 Standby Outputs ...

Page 105

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments OTimer na ed Disabled If enabled, with the timeout v

Page 106

IntelP®P Server Board S3420GP TPS BIOS User Interface Table 22. Setup Utility – Console Redirection Configuration Fields Setup Item Options Help Te

Page 107 - 9.4.12 Protection Circuits

BIOS User Interface IntelP®P Server Board S3420GP TPS Server Management System Information Board Part Number Board Serial Number System Part N

Page 108 - Revision 1.0

IntelP®P Server Board S3420GP TPS BIOS User Interface Main Advanced Security Server Management Boot Options Boot Manager System Boot Timeout <

Page 109

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text Comments Ne ork Device Order Set the order ofthis group. tw

Page 110

IntelP®P Server Board S3420GP TPS BIOS User Interface Setup Item Options Help Text Delete Boot Option Select one to Delete Remove an EFI boot optio

Page 111

BIOS User Interface IntelP®P Server Board S3420GP TPS Setup Item Options Help Text CDROM #1 Available Legacy devices for this Device Set system bo

Page 112

IntelP®P Server Board S3420GP TPS BIOS User Interface Table 29. Setup Utility etwork Device O – N rder Fields Setup Item Options Help Text Netw vic

Page 113

BIOS User Interface IntelP®P Server Board S3420GP TPS • Moving the clear system configuration jumper. • IPMI command (se ystem andthe BIOS Setup lo

Page 114

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs 6. Connector / Header Locations and Pin-outs 6.1The foljumpercorresp. Boa

Page 115 - IntelP®P Serv

List of Figures IntelP®P Server Board S3420GP TPS List of Figures Figure 1. Intel® Server Board S3420GPLX Picture ...

Page 116

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS  One SSI-compliant 2x4 pin power connector (J9C1), which provides 12-V po

Page 117

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs Pin Signal Name Pin Signal Name 1 P3V3_AUX 2 RMII_IBMC_RMM3_MDIO 3 P3V

Page 118

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS 2 SGPIO Load Signal SGPIO_LOAD3 SGPIO_DATAOUT0 S IO DaGP ta Out 4 SGP

Page 119

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs power state signals from the chipset and de-asserts PS_PWR_ON to the power

Page 120

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS Table 39. System Status LED Indicator States Color State Criticality Descr

Page 121

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs 6.5 I/O Connectors 6.5.1 VGA Connector The following table details the pin

Page 122

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS Pin Signa l Name Pin Signal Name 1 P5V_USB_PWR75 H_112 USB_PC _FB_DN 3

Page 123

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs Table 45. External Serial A Port Pin-out (J8A1) Pin Signal Name Descript

Page 124

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS Table 47. Internal USB Connector Pin-out ( J1E1, J1D1) Pin Signal Name D

Page 125

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs 6.6 PCI Express* Slot / PCI Slot / Riser Card Slot / A PCI-E Riser card

Page 126

IntelP®P Server Board S3420GP TPS List of Figures Figure 33. Setup Utility – Network Device Order Screen Display ...

Page 127 - Appendix D: POST Code Errors

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS B39 GND GND A39 PERP5 P2E_CPU_S6_RXN<2> B40 GND GND A40 PERN5 P

Page 128

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs Three PCI Express* x8 connectors (J2B2, J3B1 and J4B2) Pin Signal Pin S

Page 129

Connector/Header Locations and Pin-outs IntelP®P Server Board S3420GP TPS Pin# Signal Pin# Signal Pin# Signal Pin# Signal A5 JTAG2 B5 SMCLK

Page 130 - Pause

IntelP®P Server Board S3420GP TPS Connector/Header Locations and Pin-outs Pin # Signal Pin # Signal Pin # Signal Pin # Signal B26 C/BE[3]# A2

Page 131 - POST Error Beep Codes

Jumper Blocks IntelP®P Server Board S3420GP TPS 7. Jumper Blocks The server board has several 3-pin jumper blocks that can be used to configure, prot

Page 132

IntelP®P Server Board S3420GP TPS Jumper Blocks Jumper Name Pins System Results Force Update 2-3 Integrated BMC Firmware Force Update Mode – Enab

Page 133 - Glossary

Jumper Blocks IntelP®P Server Board S3420GP TPS 7. Open the chassis and move the jumper back to the default position (covering pins 1 and 2). 8. Cl

Page 134

IntelP®P Server Board S3420GP TPS Jumper Blocks firmware update process fails due to ME not being in the proper update state, the server board provid

Page 135

Intel® Light Guided Diagnostics IntelP®P Server Board S3420GP TPS 8. Intel® Light Guided Diagnostics The server board has several on-board diagnosti

Page 136 - Reference Documents

IntelP®P Server Board S3420GP TPS Intel® Light Guided Diagnostics 8.2 Post Code Diagnostic LEDs During the system boot process, the BIOS executes se

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