Intel MFS5000SIB Datasheet Page 1

Intel® Compute Module MFS5000SI Technical Product Specification Intel order number: E15154-007 Revision 1.4 June 2009Enterprise Platforms and

1BProduct Overview Intel® Compute Module MFS5000SI TPS 2.2.2 External I/O Connector Locations The following drawing shows the layout of the externa

Intel® Compute Module MFS5000SI TPS 1BProduct Overview Revision 1.4 5 2.2.3 Compute Module Mechanical Drawings Figure 3. Intel® Compute Module

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3. Functional Architecture The architecture and design of the Intel® Compute Module

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture 3.1 Intel® 5000P Memory Controller Hub (MCH) This section describes the general func

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3.1.2.2 Common Enabling Kit (CEK) Design Support The compute module complies with In

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture Revision 1.4 9 Intel order number: E15154-007 TP02299DIMM D2DIMM D1DIMM C2DIMM C1D

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3.1.3.2 Supported and Nonsupported Memory Configurations The server board design sup

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture Supported and Validated configuration : Slot is populated Supported but not valid

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS TP02300DIMM D2DIMM D1DIMM C2DIMM C1DIMM B2DIMM B1DIMM A2DIMM A1Branch 0MCHChannel ACh

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture TP02301DIMM D2DIMM D1DIMM C2DIMM C1DIMM B2DIMM B1DIMM A2DIMM A1Branch 0MCHChannel ACh

Revision History Intel® Compute Module MFS5000SI TPS Revision History Date Revision Number Modifications July 2007 0.95 Initial release. August

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3.1.3.4.2.1 Single Branch Mode Sparing Channel A Channel B Channel C Channel D B

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture Note: Use of identical memory is recommended with the Intel® Compute Module MFS5000SI

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3.2 Intel® 6321ESB I/O Controller Hub The Intel® 6321ESB I/O Controller Hub is a mul

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture Revision 1.4 17 Intel order number: E15154-007 PCI Bus Segment Voltage Width Sp

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS 3.2.4 USB 2.0 Support The USB controller functionality integrated into the Intel® 63

Intel® Compute Module MFS5000SI TPS 2BFunctional Architecture 3.4 Network Interface Controller (NIC) Network interface support is provided from t

2BFunctional Architecture Intel® Compute Module MFS5000SI TPS Table 6. Serial Header Pin-out Pin Signal Name Serial Port Header Pin-out 1 DCD 2 D

Intel® Compute Module MFS5000SI TPS 3BConnector / Header Locations and Pin-outs 4. Connector / Header Locations and Pin-outs 4.1 Board Connector

3BConnector / Header Locations and Pin-outs Intel® Compute Module MFS5000SI TPS 4.3 I/O Connector Pin-out Definition 4.3.1 VGA Connector The foll

Intel® Compute Module MFS5000SI TPS 3BConnector / Header Locations and Pin-outs A10 GND E10 SMB_SCL I10 P12V B1 PE4_MCH_RXN_C0 F1 GND J1 XE_P

Intel® Compute Module MFS5000SI TPS Table of Contents Table of Contents 1. Introduction...

3BConnector / Header Locations and Pin-outs Intel® Compute Module MFS5000SI TPS A6 GND E6 XE_P2_B_TXP I6 SAS_P2_TXN A7 XE_P1_D_RXP E7 XE_P2_A_R

Intel® Compute Module MFS5000SI TPS 3BConnector / Header Locations and Pin-outs Revision 1.4 25 Intel order number: E15154-007 Table 6 for the p

4BJumper Block Settings Intel® Compute Module MFS5000SI TPS 5. Jumper Block Settings The server board has several 3-pin jumper blocks that can be

Intel® Compute Module MFS5000SI TPS 4BJumper Block Settings Table 14. Recovery Jumpers Jumper Name Pins What happens at system reset … 1-2 BMC

4BJumper Block Settings Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 28 4. Move jumper from Default operating

Intel® Compute Module MFS5000SI TPS 5BProduct Regulatory Requirements 6. Product Regulatory Requirements 6.1 Product Regulatory Requirements The

Appendix A: Integration and Usage Tips Intel® Compute Module MFS5000SI TPS Appendix A: Integration and Usage Tips  When two processors are instal

Intel® Compute Module MFS5000SI TPS Appendix B: Sensor Tables Appendix B: BMC Sensor Tables Table 15 lists the sensor identification numbers and in

Appendix B: Sensor Tables Intel® Compute Module MFS5000SI TPS Sensor Rearm The rearm is a request for the event status for a sensor to be rechecked

Intel® Compute Module MFS5000SI TPS Appendix B: Sensor Tables Revision 1.4 Intel order number: E15154-007 33 Name # Sensor Type Event / Reading

Table of Contents Intel® Compute Module MFS5000SI TPS 4.3.4 Serial Port Connector ...

Appendix B: Sensor Tables Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 34 Name # Sensor Type Event / Reading

Intel® Compute Module MFS5000SI TPS Appendix B: Sensor Tables Revision 1.4 Intel order number: E15154-007 35 Name # Sensor Type Event / Reading

Appendix B: Sensor Tables Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 36 Table 16. Analog Sensor Thresholds

Intel® Compute Module MFS5000SI TPS Appendix C: POST Error Messages and Handling Appendix C: POST Error Messages and Handling Whenever possible, th

Appendix C: POST Error Messages and Handling Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 38 Error Code Erro

Intel® Compute Module MFS5000SI TPS Appendix C: POST Error Messages and Handling Revision 1.4 Intel order number: E15154-007 39 Error Code Err

Appendix D: Supported Intel® Server Chassis Intel® Compute Module MFS5000SI TPS Appendix D: Supported Intel® Modular Server System The Intel® Compu

Intel® Compute Module MFS5000SI TPS Glossary Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numer

Glossary Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 42 Term Definition IFB I/O and Firmware Bridge INTR In

Intel® Compute Module MFS5000SI TPS Glossary Revision 1.4 Intel order number: E15154-007 43 Term Definition SIO Server Input/Output SMBus Sys

Intel® Compute Module MFS5000SI TPS List of Figures List of Figures Figure 1. Component and Connector Location Diagram ...

Reference Documents Intel® Compute Module MFS5000SI TPS Reference Documents See the following documents for additional information:  Intel® 5000

List of Tables Intel® Compute Module MFS5000SI TPS Revision 1.4 Intel order number: E15154-007 vi List of Tables Table 1. I2C Addresses for Memory

Intel® Compute Module MFS5000SI TPS 0BIntroduction 1. Introduction This Technical Product Specification (TPS) provides board-specific information d

1BProduct Overview Intel® Compute Module MFS5000SI TPS 2. Product Overview The Intel® Compute Module MFS5000SI is a monolithic printed circuit boa

Intel® Compute Module MFS5000SI TPS 1BProduct Overview 2.2 Compute Module Layout 2.2.1 Connector and Component Locations The following figure show