Intel AI5VG User Manual

AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Version 2.0

Chapter 3 Hardware Description 6 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 3.1 Processor and CPU Voltage The AI5VG is designed to take a

Chapter 3 Hardware Description AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 7 (1) 72-pin SIMM (5V) EDO DRAM Bank0 (SIMM1, SIMM2) Bank1 (SI

Chapter 3 Hardware Description 8 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual (2) 168-pin DIMM (3.3V) SDRAM or EDO DRAM Bank0 (DIMM2) Bank

Chapter 3 Hardware Description AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 9 3. Power Management The power management feature provides po

Chapter 3 Hardware Description 10 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 3.8 I/O Port Address Map Each peripheral device in the syste

Chapter 3 Hardware Description AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 11 3.10 Interrupt Request Lines (IRQ) There are a total of 15 I

Chapter 4 Hardware Settings 12 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Chapter 4 Hardware Settings The following sections describe th

Chapter 4 Hardware Settings AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 13 Figure 2: Jumper Locations of the AI5VG

Chapter 4 Hardware Settings 14 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 4.1 SW1(1-8): CPU Frequency Selector For Intel Pentium CPU SW1

Chapter 4 Hardware Settings AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 15 For Cyrix 6x86, 6x86L CPU SW1 Bus Clock Mutiplier CPU FREQ.

Chapter 4 Hardware Settings 16 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual SW1 Bus Clock Mutiplier CPU FREQ. off off off off on on

Chapter 4 Hardware Settings AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 17 For Dual Voltage CPU: Intel P55C, Cyrix 6x86L/MX, AMD K6 SW2

Chapter 4 Hardware Settings 18 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual For Dual Voltage CPU: Intel P55C, Cyrix 6x86L/MX, AMD K6 SW2 V

Chapter 5 Installation AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 19 Chapter 5 Installation This chapter describes the connectors and

Chapter 5 Installation 20 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Figure 3: Connector Location on the AI5VG

Chapter 5 Installation AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 21 5.1 I/O Connectors The I/O connectors connect the AI5VG to the mos

Chapter 5 Installation 22 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 5.3 J2: ATX Power Supply Connector J2 is a 20-pin ATX power supply c

Chapter 5 Installation AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 23 5.5 J7, J6: Serial Ports The onboard serial ports of the AI5VG are

Chapter 5 Installation 24 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 5.7 J9, J11: EIDE Connectors J9: Primary IDE Connector Signal Na

Chapter 5 Installation AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 25 5.8 J10: Parallel Port Connector The following table describes the

Contents AI5VG Pentium VP3 Baby AT Motherboard User’s Manual i Contents Chapter 1 Introduction...

Chapter 5 Installation 26 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 5.11 J13 Wake on LAN Connector J13is a 3-pin header for Wake on LAN

Chapter 5 Installation AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 27 Speaker: Pins 1 - 4 This connector provides an interface to a s

Chapter 5 Installation 28 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Reset Switch: Pins 9 and 19 The reset switch allows the user to r

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 29 Chapter 6 BIOS Configuration This chapter describes the di

Chapter 7 LANDesk User Guide 30 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Cache Rd+CPU Wt Pipeline Read Around Write Cache Timing Video B

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 31 IDE Primary/Secondary Master/Slave PIO IDE Primary/Secondary

Chapter 7 LANDesk User Guide 32 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.1 BIOS Introduction The Award BIOS (Basic Input/Output Syste

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 33 ROM PCI/ISA BIOS CMOS SETUP UTILITY AWARD SOFTWARE, INC. STA

Chapter 7 LANDesk User Guide 34 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.3 Standard CMOS Setup “Standard CMOS Setup” choice allows yo

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 35 Time The time format is: Hour : 00 to 23 Minute : 00

Contents ii AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Chapter 6 BIOS Configuration...29 6.1 BIOS Intro

Chapter 7 LANDesk User Guide 36 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual NOTE: The specifications of your drive must match with the dri

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 37 6.4 BIOS Features Setup This section allows you to configure

Chapter 7 LANDesk User Guide 38 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Quick Power On Self Test This choice speeds up the Power On Sel

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 39 Typematic Rate Setting When disabled, continually holding dow

Chapter 7 LANDesk User Guide 40 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.5 Chipset Features Setup This Setup menu controls the config

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 41 Cache Timing This field sets the timing of the cache in the s

Chapter 7 LANDesk User Guide 42 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.6 Power Management Setup The Power Management Setup allows y

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 43 PM Control by APM This field allows you to use the Advanced P

Chapter 7 LANDesk User Guide 44 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual PM Events The VGA, LPT & COM, HDD & FDD, DMA /master, M

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 45 6.7 PNP/PCI Configuration This option configures the PCI bu

Chapter 1 Introduction AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 1 Chapter 1 Introduction This manual is designed to give you informatio

Chapter 7 LANDesk User Guide 46 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual CPU to PCI Write Buffer When enabled, this option increase the

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 47 PCI IDE IRQ Map To This field allows you to configure the typ

Chapter 7 LANDesk User Guide 48 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.8 Load BIOS Defaults This option allows you to load the trou

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 49 6.10 Integrated Peripherals This option sets your hard disk

Chapter 7 LANDesk User Guide 50 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual The system supports five modes, numbered from 0 (default) to 4,

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 51 6.11 Supervisor / User Password These two options set the s

Chapter 7 LANDesk User Guide 52 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 6.12 IDE HDD Auto Detection This option detects the parameters

Chapter 7 LANDesk User Guide AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 53 6.14 Save & Exit Setup This option allows you to determi

Chapter 2 Specifications 2 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Chapter 2 Specifications Based on VIA’s VP3AT chipset, the AI5VG i

Chapter 2 Specifications AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 3 Onboard Bus Mastering EIDE Two EIDE interfaces for up to four devic

Chapter 3 Hardware Description 4 AI5VG Pentium VP3 Baby AT Motherboard User’s Manual Chapter 3 Hardware Description This chapter briefly describe

Chapter 3 Hardware Description AI5VG Pentium VP3 Baby AT Motherboard User’s Manual 5 Figure 1: Layout of the AI5VG Motherboard