Intel Galileo Gen 2 Board Specifications

Order Number: 329679-001USIntel® Quark SoC X1000 CoreDeveloper’s ManualOctober 2013

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201310 Order Number: 329679-001US10.3.11.2Shutdown Indication Cycle ..

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013100 Order Number: 329679-001US6.4.4 #GP Faults

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 101Protected Mode Architecture—Intel® Quark CoreIf CR4.SMEP = 1,

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013102 Order Number: 329679-001US— The I/D bit of

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 103Protected Mode Architecture—Intel® Quark CoreThe R/W and U/S b

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013104 Order Number: 329679-001USReading a new ent

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 105Protected Mode Architecture—Intel® Quark CoreFigure 46 illustr

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013106 Order Number: 329679-001US• I/D flag (bit 4

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 107Protected Mode Architecture—Intel® Quark CoreNote: Even though

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013108 Order Number: 329679-001US6.5.2 Virtual 808

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 109Protected Mode Architecture—Intel® Quark CoreThe paging hardwa

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 11Contents—Intel® Quark Core12.2.5.3 RDTSC ...

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013110 Order Number: 329679-001USNote that the I/O

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 111Protected Mode Architecture—Intel® Quark CoreAn Intel® Quark S

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013112 Order Number: 329679-001USThe VM bit can be

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 113Protected Mode Architecture—Intel® Quark Core3. Push the legac

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013114 Order Number: 329679-001US7.0 On-Chip CacheThe Intel® Qua

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 115On-Chip Cache—Intel® Quark CoreThe Write-Back Enhanced Intel®

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013116 Order Number: 329679-001US7.2 Cache ControlControl of the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 117On-Chip Cache—Intel® Quark CoreCD=1, NW=1The 1,1 state is best

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013118 Order Number: 329679-001US7.4 Cache Line InvalidationsThe

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 119On-Chip Cache—Intel® Quark CoreThe pseudo LRU mechanism works

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201312 Order Number: 329679-001US9 Base Architecture Registers ...

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013120 Order Number: 329679-001USThe state of the PCD bit in the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 121On-Chip Cache—Intel® Quark CoreFigure 52. Page Cacheability7.6

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013122 Order Number: 329679-001US7.7 Cache FlushingThe on-chip c

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 123On-Chip Cache—Intel® Quark CoreSnoop cycles with invalidation

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013124 Order Number: 329679-001USWith the modified MESI protocol

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 125On-Chip Cache—Intel® Quark CoreNote that even though memory wr

Intel® Quark Core—On-Chip CacheIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013126 Order Number: 329679-001USA software mechanism to determi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 127System Management Mode (SMM) Architectures—Intel® Quark Core8.

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013128 Order Number: 329679-001USSM

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 129System Management Mode (SMM) Architectures—Intel® Quark CoreTh

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 13Contents—Intel® Quark Core61 I/O Instruction Restart...

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013130 Order Number: 329679-001USTh

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 131System Management Mode (SMM) Architectures—Intel® Quark CoreTh

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013132 Order Number: 329679-001USFi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 133System Management Mode (SMM) Architectures—Intel® Quark Core8.

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013134 Order Number: 329679-001USAu

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 135System Management Mode (SMM) Architectures—Intel® Quark CoreFi

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013136 Order Number: 329679-001USWh

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 137System Management Mode (SMM) Architectures—Intel® Quark CoreTh

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013138 Order Number: 329679-001US8.

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 139System Management Mode (SMM) Architectures—Intel® Quark Corein

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201314 Order Number: 329679-001US113 Snoop Cycle Invalidating a Modifi

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013140 Order Number: 329679-001USIf

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 141System Management Mode (SMM) Architectures—Intel® Quark CoreTo

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013142 Order Number: 329679-001USIf

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 143System Management Mode (SMM) Architectures—Intel® Quark CoreFi

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013144 Order Number: 329679-001USFi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 145System Management Mode (SMM) Architectures—Intel® Quark CoreIf

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013146 Order Number: 329679-001US8.

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 147System Management Mode (SMM) Architectures—Intel® Quark Corele

Intel® Quark Core—System Management Mode (SMM) ArchitecturesIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013148 Order Number: 329679-001US•

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 149Hardware Interface—Intel® Quark Core9.0 Hardware Interface9.1

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 15Contents—Intel® Quark Core28 Descriptor Types Used for Control

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013150 Order Number: 329679-001US9.2 Signal Descriptions9.2

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 151Hardware Interface—Intel® Quark Coreaddress space (00000000H t

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013152 Order Number: 329679-001USindicated by the byte enab

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 153Hardware Interface—Intel® Quark Core9.2.5.3 Pseudo-Lock Output

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013154 Order Number: 329679-001USRDY# is active low, and is

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 155Hardware Interface—Intel® Quark Core9.2.8.2 Soft Reset Input (

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013156 Order Number: 329679-001US9.2.8.6 Non-maskable Inter

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 157Hardware Interface—Intel® Quark Coreperforming a code fetch, a

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013158 Order Number: 329679-001US9.2.10.1 Address Hold Requ

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 159Hardware Interface—Intel® Quark CoreFLUSH# also determines whe

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201316 Order Number: 329679-001US78 Encoding of reg Field when the (w)

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013160 Order Number: 329679-001US1. The stack fault, invali

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 161Hardware Interface—Intel® Quark CoreBS16# and BS8# are active

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013162 Order Number: 329679-001US9.2.17.2 Cache Flush (FLUS

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 163Hardware Interface—Intel® Quark Core9.2.17.4 Soft Reset (SRESE

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013164 Order Number: 329679-001US9.2.17.6 Write-Back/Write-

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 165Hardware Interface—Intel® Quark CoreIn addition to using TCK a

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013166 Order Number: 329679-001US9.3.1 Interrupt LogicThe I

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 167Hardware Interface—Intel® Quark CoreThe SMI# input must be hel

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013168 Order Number: 329679-001USWrites are driven onto the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 169Hardware Interface—Intel® Quark Core9.4.1 Write Buffers and I/

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 17About this Manual—Intel® Quark Core1.0 About this ManualThis ma

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013170 Order Number: 329679-001US9.5.1 Floating-Point Regis

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 171Hardware Interface—Intel® Quark Core9.5.2 Pin State During Res

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013172 Order Number: 329679-001USFigure 72. Pin States Duri

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 173Hardware Interface—Intel® Quark Core9.5.2.1 Controlling the CL

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013174 Order Number: 329679-001US7:0 depend on whether or n

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 175Hardware Interface—Intel® Quark CoreM/IO# = 0, D/C# = 0, W/R#

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013176 Order Number: 329679-001US9.6.3 Write-Back Enhanced

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 177Hardware Interface—Intel® Quark CoreThe Write-Back Enhanced In

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013178 Order Number: 329679-001USare not recognized until o

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 179Hardware Interface—Intel® Quark Core9.6.4.3 Stop Clock StateSt

Intel® Quark Core—About this ManualIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201318 Order Number: 329679-001US1.2 Notation ConventionsThe

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013180 Order Number: 329679-001USA FLUSH# event during the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 181Hardware Interface—Intel® Quark CoreFigure 76. Write-Back Enha

Intel® Quark Core—Hardware InterfaceIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013182 Order Number: 329679-001US• The processor latches an

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 183Hardware Interface—Intel® Quark Corein this state, the FLUSH#

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013184 Order Number: 329679-001US10.0 Bus OperationWhen the inte

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 185Bus Operation—Intel® Quark CoreFigure 77. Physical Memory and

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013186 Order Number: 329679-001USFigure 78. Physical Memory and

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 187Bus Operation—Intel® Quark CoreThe external system must contai

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013188 Order Number: 329679-001USIn 32-bit physical memories, su

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 189Bus Operation—Intel® Quark CoreTable 64. Generating A1, BHE# a

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 19About this Manual—Intel® Quark CoreRegister Bits When the text

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013190 Order Number: 329679-001USCombinations of BE[3:0]# that n

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 191Bus Operation—Intel® Quark CoreFigure 82. Data Bus Interface t

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013192 Order Number: 329679-001US10.1.5 Operand AlignmentPhysica

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 193Bus Operation—Intel® Quark CoreIn the unaligned transfer descr

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013194 Order Number: 329679-001USFigure 84. Single Intel® Quark

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 195Bus Operation—Intel® Quark CoreFigure 85. Single Intel® Quark

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013196 Order Number: 329679-001USThe Intel® Quark SoC X1000 Core

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 197Bus Operation—Intel® Quark CoreFigure 86. Basic 2-2 Bus CycleT

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013198 Order Number: 329679-001USFigure 87. Basic 3-3 Bus CycleT

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 199Bus Operation—Intel® Quark CoreBurst cycles begin with the Int

Intel® Quark SoC X1000 CoreDeveloper’s Manual October 20132 Order Number: 329679-001USLegal Lines and DisclaimersINFORMATION IN THIS DOCUMENT IS PROVI

Intel® Quark Core—About this ManualIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201320 Order Number: 329679-001US1.4 Related DocumentsThe fol

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013200 Order Number: 329679-001US10.3.2.3 Non-Cacheable, Non-Bur

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 201Bus Operation—Intel® Quark CoreFigure 89. Non-Cacheable Burst

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013202 Order Number: 329679-001USconditions 1–3 in the above lis

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 203Bus Operation—Intel® Quark CoreFigure 90. Non-Burst, Cacheable

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013204 Order Number: 329679-001USFigure 91. Burst Cacheable Cycl

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 205Bus Operation—Intel® Quark CoreFigure 92. Effect of Changing K

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013206 Order Number: 329679-001USFigure 93. Slow Burst Cycle10.3

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 207Bus Operation—Intel® Quark CoreFigure 94. Burst Cycle Showing

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013208 Order Number: 329679-001USFigure 95. Interrupted Burst Cy

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 209Bus Operation—Intel® Quark CoreFigure 96. Interrupted Burst Cy

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 21Intel® Quark SoC X1000 Core Overview—Intel® Quark Core2.0 Intel

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013210 Order Number: 329679-001USFigure 97. 8-Bit Bus Size Cycle

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 211Bus Operation—Intel® Quark CoreFigure 98. Burst Write as a Res

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013212 Order Number: 329679-001USFigure 99. Locked Bus Cycle10.3

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 213Bus Operation—Intel® Quark CorePLOCK# can change several times

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013214 Order Number: 329679-001USFigure 101. Fast Internal Cache

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 215Bus Operation—Intel® Quark Core10.3.8.1 Rate of Invalidate Cyc

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013216 Order Number: 329679-001USFigure 103. System with Second-

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 217Bus Operation—Intel® Quark CoreFigure 104. Cache Invalidation

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013218 Order Number: 329679-001USFigure 105. HOLD/HLDA CyclesNot

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 219Bus Operation—Intel® Quark CoreFigure 106. HOLD Request Acknow

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201322 Order Number: 329679-001US3.0 Architectural Overv

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013220 Order Number: 329679-001USFigure 107. Interrupt Acknowled

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 221Bus Operation—Intel® Quark Core10.3.11.2 Shutdown Indication C

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013222 Order Number: 329679-001US10.3.12 Bus Cycle RestartIn a m

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 223Bus Operation—Intel® Quark CoreFigure 110. Restarted Write Cyc

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013224 Order Number: 329679-001US10.3.13 Bus StatesA bus state d

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 225Bus Operation—Intel® Quark Core10.3.14 Floating-Point Error Ha

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013226 Order Number: 329679-001USIn systems with user-defined er

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 227Bus Operation—Intel® Quark Core2. Four signals: INV, WB/WT#, H

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013228 Order Number: 329679-001UScacheable by either CACHE# or K

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 229Bus Operation—Intel® Quark CoreX1000 Core invalidates the line

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 23Architectural Overview—Intel® Quark CoreIn addition to these ba

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013230 Order Number: 329679-001US10.4.3.2 Snoop under AHOLDSnoop

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 231Bus Operation—Intel® Quark CoreFigure 113. Snoop Cycle Invalid

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013232 Order Number: 329679-001USIn Figure 114, the snoop to an

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 233Bus Operation—Intel® Quark Core10.4.3.2.2 AHOLD Snoop Overlayi

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013234 Order Number: 329679-001US3. If the snoop occurs when INV

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 235Bus Operation—Intel® Quark CoreIf there is a snoop hit to a di

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013236 Order Number: 329679-001USFigure 117. Snoop under BOFF# d

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 237Bus Operation—Intel® Quark Core10.4.3.4.2 Snoop under BOFF# du

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013238 Order Number: 329679-001US10.4.3.5.1 Snoop under HOLD dur

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 239Bus Operation—Intel® Quark CoreFigure 120. Snoop using HOLD du

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201324 Order Number: 329679-001USFigure 2. Address Trans

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013240 Order Number: 329679-001USto the system that the processo

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 241Bus Operation—Intel® Quark Core10.4.4.1 Snoop/Lock CollisionIf

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013242 Order Number: 329679-001USIf the processor is in Standard

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 243Bus Operation—Intel® Quark CoreFigure 124. Snoop under AHOLD O

Intel® Quark Core—Bus OperationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013244 Order Number: 329679-001USFigure 125. Snoop under HOLD Ov

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 245Bus Operation—Intel® Quark CoreFigure 126. Snoop under BOFF# O

Intel® Quark Core—Debugging SupportIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013246 Order Number: 329679-001US11.0 Debugging SupportThe I

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 247Debugging Support—Intel® Quark Core11.3.1 Linear Address Break

Intel® Quark Core—Debugging SupportIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013248 Order Number: 329679-001USRWi (memory access qualifie

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 249Debugging Support—Intel® Quark CoreNote that instruction execu

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 25Architectural Overview—Intel® Quark Core3.4 I/O SpaceThe Intel®

Intel® Quark Core—Debugging SupportIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013250 Order Number: 329679-001USGi and Li (breakpoint enabl

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 251Debugging Support—Intel® Quark CoreBD (debug fault due to atte

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013252 Order Number: 329679-001US12.0 Instruction Set

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 253Instruction Set Summary—Intel® Quark Core12.1.1 Floating-Point

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013254 Order Number: 329679-001US12.2.2 32-Bit Extensi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 255Instruction Set Summary—Intel® Quark Core12.2.3 Encoding of In

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013256 Order Number: 329679-001US12.2.3.3 Encoding of

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 257Instruction Set Summary—Intel® Quark Core12.2.3.4 Encoding of

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013258 Order Number: 329679-001USTable 81. Encoding of

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 259Instruction Set Summary—Intel® Quark CoreTable 82. Encoding of

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201326 Order Number: 329679-001US3.5.2 Register and Imme

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013260 Order Number: 329679-001US12.2.3.5 Encoding of

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 261Instruction Set Summary—Intel® Quark Core12.2.3.6 Encoding of

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013262 Order Number: 329679-001US12.2.4 Encoding of Fl

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 263Instruction Set Summary—Intel® Quark Core12.2.5 Intel® Quark S

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013264 Order Number: 329679-001USIn 64-bit mode, defau

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 265Instruction Set Summary—Intel® Quark CoreThis instruction must

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013266 Order Number: 329679-001USWhen the destination

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 267Instruction Set Summary—Intel® Quark CoreTable 89. Clock Count

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013268 Order Number: 329679-001USLEA = Load EA to Regi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 269Instruction Set Summary—Intel® Quark CoreTEST = Logical Compar

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 27Architectural Overview—Intel® Quark CoreBased Scaled Index Mode

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013270 Order Number: 329679-001USIMUL = Integer Multip

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 271Instruction Set Summary—Intel® Quark CoreCWD = Convert Word to

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013272 Order Number: 329679-001USCONTROL TRANSFER (wit

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 273Instruction Set Summary—Intel® Quark CoreRET = Return from CAL

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013274 Order Number: 329679-001USRET = Return from CAL

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 275Instruction Set Summary—Intel® Quark CoreSTRING INSTRUCTIONSCM

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013276 Order Number: 329679-001USSTD = Set Direction F

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 277Instruction Set Summary—Intel® Quark CoreINVD = Invalidate Dat

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013278 Order Number: 329679-001USLTR = Load Task Regis

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 279Instruction Set Summary—Intel® Quark CoreRSM = Exit System Ma

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201328 Order Number: 329679-001US3.5.4 Differences Betwe

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013280 Order Number: 329679-001USProtected ModeInterru

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 281Instruction Set Summary—Intel® Quark Core1. Assuming that the

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013282 Order Number: 329679-001USVariable Port 1110 11

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 283Instruction Set Summary—Intel® Quark CoreTable 94. Floating-Po

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013284 Order Number: 329679-001USFXCH = Exchange ST(0)

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 285Instruction Set Summary—Intel® Quark CoreCONSTANTSFLDZ = Load

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013286 Order Number: 329679-001USFSUB = Subtract Real

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 287Instruction Set Summary—Intel® Quark CoreFDIV = Divide ST(0) b

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013288 Order Number: 329679-001USFISUBR = Integer Subt

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 289Instruction Set Summary—Intel® Quark CoreFABS = Absolute value

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 29Architectural Overview—Intel® Quark Core3.6.1.1 Unsigned Data T

Intel® Quark Core—Instruction Set SummaryIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013290 Order Number: 329679-001USFCLEX = Clear excepti

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 291Signal Descriptions—Intel® Quark CoreAppendix A Signal Descrip

Intel® Quark Core—Signal DescriptionsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013292 Order Number: 329679-001USLOCK# OThe Bus Lock pin i

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 293Signal Descriptions—Intel® Quark CoreSRESET IThe Soft Reset pi

Intel® Quark Core—Signal DescriptionsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013294 Order Number: 329679-001USFLUSH# IThe Cache Flush i

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 295Signal Descriptions—Intel® Quark CoreWRITE-BACK ENHANCED Intel

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013296 Order Number: 329679-001USAppendix B TestabilityThis append

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 297Testability—Intel® Quark CoreCache Data Test Register: TR3The

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013298 Order Number: 329679-001USto TR3 initiates the write to the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 299Testability—Intel® Quark Corewill be corrupted. This is becaus

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 3Revision History—Intel® Quark CoreRevision HistoryDate Revision

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201330 Order Number: 329679-001US8-bit Integer: Signed 8

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013300 Order Number: 329679-001USFigure 130. TR4 Definition for St

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 301Testability—Intel® Quark CoreB.2.2 TLB Test Registers TR6 and

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013302 Order Number: 329679-001USFigure 133. TLB Test RegistersThe

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 303Testability—Intel® Quark CoreB.2.2.2 Data Test Register: TR7TR

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013304 Order Number: 329679-001USTR6 must be written to initiate t

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 305Testability—Intel® Quark CoreB.3.1.1 Test-Logic-Reset StateIn

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013306 Order Number: 329679-001USB.3.1.4 Capture-DR StateIn this s

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 307Testability—Intel® Quark CoreB.3.1.9 Update-DR StateThe JTAG r

Intel® Quark Core—TestabilityIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013308 Order Number: 329679-001USThe test data register selected b

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 309Feature Determination—Intel® Quark CoreAppendix C Feature Dete

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 31Architectural Overview—Intel® Quark Core3.6.1.6 ASCII Data Type

Intel® Quark Core—Feature DeterminationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 2013310 Order Number: 329679-001USThe Intel® Quark SoC X1

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 311Feature Determination—Intel® Quark CoreRefer to the Intel appl

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201332 Order Number: 329679-001USFigure 6. String and AS

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 33Architectural Overview—Intel® Quark Core3.6.2 Little Endian vs.

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201334 Order Number: 329679-001USExceptions are classifi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 35Architectural Overview—Intel® Quark CoreThe IF bit in the EFLAG

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201336 Order Number: 329679-001USWhile executing the NMI

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 37Architectural Overview—Intel® Quark CoreAs the Intel® Quark SoC

Intel® Quark Core—Architectural OverviewIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201338 Order Number: 329679-001US3.7.8 Double FaultA Dou

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 39System Register Organization—Intel® Quark Core4.0 System Regist

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 20134 Order Number: 329679-001USContents1.0 About this Manual...

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201340 Order Number: 329679-001USNote: In register

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 41System Register Organization—Intel® Quark CoreThe least signifi

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201342 Order Number: 329679-001USID (Identificatio

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 43System Register Organization—Intel® Quark CoreX1000 Core does n

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201344 Order Number: 329679-001USIF (INTR Enable F

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 45System Register Organization—Intel® Quark CoreFigure 11. Intel®

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201346 Order Number: 329679-001USFigure 12. System

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 47System Register Organization—Intel® Quark Core4.4.1.1 Control R

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201348 Order Number: 329679-001USThe low-order 16

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 49System Register Organization—Intel® Quark Corereach the externa

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 5Contents—Intel® Quark Core4.4.1.1 Control Register 0 (CR0)...

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201350 Order Number: 329679-001USTS (Task Switch,

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 51System Register Organization—Intel® Quark Core4.4.1.2 Control R

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201352 Order Number: 329679-001USinstructions allo

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 53System Register Organization—Intel® Quark Core4.5 Floating-Poin

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201354 Order Number: 329679-001US4.5.2 Floating-Po

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 55System Register Organization—Intel® Quark CoreFigure 17. Floati

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201356 Order Number: 329679-001USTable 14. Conditi

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 57System Register Organization—Intel® Quark CoreBit 7 is the erro

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201358 Order Number: 329679-001USSection 4.5.4.Not

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 59System Register Organization—Intel® Quark CoreFigure 18. Protec

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 20136 Order Number: 329679-001US6.3.5 Call Gates...

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201360 Order Number: 329679-001USFigure 20. Protec

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 61System Register Organization—Intel® Quark CoreFigure 22. FPU Co

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201362 Order Number: 329679-001USaffects only the

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 63System Register Organization—Intel® Quark Core4.7.1 FPU Registe

Intel® Quark Core—System Register OrganizationIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201364 Order Number: 329679-001US• Do not depend o

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 65Real Mode Architecture—Intel® Quark Core5.0 Real Mode Architect

Intel® Quark Core—Real Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201366 Order Number: 329679-001US5.2 Memory AddressingIn

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 67Real Mode Architecture—Intel® Quark Core5.4 InterruptsMany of t

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201368 Order Number: 329679-001US6.0 Protected Mode

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 69Protected Mode Architecture—Intel® Quark Core6.2 Segmentation6.

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 7Contents—Intel® Quark Core8.1 SMM Overview...

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201370 Order Number: 329679-001US6.2.2 TerminologyT

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 71Protected Mode Architecture—Intel® Quark Core6.2.3.2 Global Des

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201372 Order Number: 329679-001USFigure 27. Interru

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 73Protected Mode Architecture—Intel® Quark Coregranularity is unr

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201374 Order Number: 329679-001USSegments identifie

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 75Protected Mode Architecture—Intel® Quark CoreFigure 29. System

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201376 Order Number: 329679-001USparameters are to

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 77Protected Mode Architecture—Intel® Quark Core6.2.4.7 Selector F

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201378 Order Number: 329679-001USFigure 31. Example

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 79Protected Mode Architecture—Intel® Quark CoreWhen operating in

Intel® Quark Core—ContentsIntel® Quark SoC X1000 CoreDeveloper’s Manual October 20138 Order Number: 329679-001US9.2.8.1 Reset Input (RESET)...

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201380 Order Number: 329679-001USFigure 33. Segment

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 81Protected Mode Architecture—Intel® Quark Core6.3 Protection6.3.

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201382 Order Number: 329679-001US6.3.2 Rules of Pri

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 83Protected Mode Architecture—Intel® Quark Core6.3.3.3 I/O Privil

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201384 Order Number: 329679-001USFigure 36. Intel®

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 85Protected Mode Architecture—Intel® Quark CoreThe IOPL also affe

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201386 Order Number: 329679-001USAny time an instru

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 87Protected Mode Architecture—Intel® Quark CoreThe privilege rule

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201388 Order Number: 329679-001USInterrupt gates an

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 89Protected Mode Architecture—Intel® Quark CoreEach task must hav

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 9Contents—Intel® Quark Core9.6.3 Write-Back Enhanced Intel® Quark

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201390 Order Number: 329679-001USa simple Protected

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 91Protected Mode Architecture—Intel® Quark CoreFigure 40. GDT Des

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201392 Order Number: 329679-001US6.4.2.3 Page Direc

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 93Protected Mode Architecture—Intel® Quark CoreCR4.PGE enables gl

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201394 Order Number: 329679-001USNote: On some proc

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 95Protected Mode Architecture—Intel® Quark Corecomprises 512 64-b

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201396 Order Number: 329679-001USFigure 42. Linear-

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 97Protected Mode Architecture—Intel® Quark CoreTable 32. Format o

Intel® Quark Core—Protected Mode ArchitectureIntel® Quark SoC X1000 CoreDeveloper’s Manual October 201398 Order Number: 329679-001USFigure 43 and Figu

Intel® Quark SoC X1000 CoreOctober 2013 Developer’s ManualOrder Number: 329679-001US 99Protected Mode Architecture—Intel® Quark CoreFigure 44. Formats