Intel 82540EP User Manual

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Summary of Contents

Page 1 - Datasheet

82540EP Gigabit Ethernet ControllerNetworking SiliconDatasheetRevision 1.2April 2003

Page 2

82540EP — Networking Silicon4 DatasheetNote: This page is intentionally left blank.

Page 3 - Revision History

Networking Silicon — 82540EPDatasheet 5 2.0 Features of the 82540EP Gigabit Ethernet Controller2.1 PCI Features2.2 MAC Specific FeaturesFeatures Benef

Page 4

82540EP — Networking Silicon6 Datasheet2.3 PHY Specific FeaturesFeatures BenefitsIntegrated PHY for 10/100/1000 Mbps full and half duplex operation• S

Page 5 - Contents

Networking Silicon — 82540EPDatasheet 7 2.5 Manageability FeaturesFeatures BenefitsManageability features: SMB port, ASF 1.0, ACPI, Wake on LAN, and P

Page 6

82540EP — Networking Silicon8 Datasheet2.6 Additional Device Features2.7 Technology FeaturesFeatures BenefitsFour activity and link indication outputs

Page 7 - 1.0 Introduction

Networking Silicon — 82540EPDatasheet 9 3.0 Signal DescriptionsNote: The targeted signal names are subject to change without notice. Verify with your

Page 8 - 82540EP Architecture

82540EP — Networking Silicon10 Datasheet CBE[3:0]#TSBus Command and Byte Enables. Bus command and byte enable signals are multiplexed on the same PCI

Page 9 - 1.3 Product Code

Networking Silicon — 82540EPDatasheet 11 3.2.2 Arbitration Signals3.2.3 Interrupt Signal3.2.4 System Signals3.2.5 Error Reporting SignalsSymbol Type N

Page 10

82540EP — Networking Silicon12 Datasheet 3.2.6 Power Management Signals3.2.7 Impedance Compensation Signals3.2.8 SMB Signals3.3 EEPROM and Serial FLAS

Page 11 - 2.2 MAC Specific Features

Networking Silicon — 82540EPDatasheet 13 3.4 Miscellaneous Signals3.4.1 LED Signals3.4.2 Other SignalsFL_CE# O FLASH Chip Enable Output. Used to enabl

Page 12 - 2.3 PHY Specific Features

ii DatasheetINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO

Page 13 - 2.5 Manageability Features

82540EP — Networking Silicon14 Datasheet 3.53.5.1 Crystal Signals3.5.2 Analog SignalsSymbol Type Name and FunctionXTAL1 ICrystal One. The Crystal One

Page 14 - 2.7 Technology Features

Networking Silicon — 82540EPDatasheet 15 3.6 Test Interface Signals3.7 Power Supply Connections3.7.1 Digital Supplies3.7.2 Analog SuppliesSymbol Type

Page 15 - 3.0 Signal Descriptions

82540EP — Networking Silicon16 Datasheet 3.7.3 Ground and No Connects3.7.4 Control SignalsSymbol Type Name and FunctionGND P Ground. NC PNo Connect. D

Page 16

Networking Silicon — 82540EPDatasheet 17 4.0 Voltage, Temperature, and Timing SpecificationsNote: The specification values listed in this section are

Page 17 - 3.2.3 Interrupt Signal

82540EP — Networking Silicon18 Datasheet 4.3 DC SpecificationsVAHAnalog High VDD Range3.3V ± 10% 33.33.6VVDCore Digital Voltage Range1.5V ± 5% 1.425 1

Page 18 - 3.2.8 SMB Signals

Networking Silicon — 82540EPDatasheet 19 Table 5. Power Specifications - D3coldD3cold - wake-up enabledD3cold - wake disabled - max power savings mod

Page 19 - 3.4 Miscellaneous Signals

82540EP — Networking Silicon20 Datasheet 2.5V 20 20 40 40 80 80 240 245 0.1 0.11.5V 10 10 30 35 55 60 400 425 1 1Subsystem 3.3V current70 mA 135 mA

Page 20 - 3.5.2 Analog Signals

Networking Silicon — 82540EPDatasheet 21 4.4 AC CharacteristicsTable 9. AC Characteristics: 3.3 V InterfacingSymbol Parameter Min Typ Max UnitPCICLK

Page 21 - 3.7 Power Supply Connections

82540EP — Networking Silicon22 Datasheet 4.5 Timing SpecificationsNote: Timing specifications are subject to change. Verify with your local Intel sale

Page 22 - 3.7.4 Control Signals

Networking Silicon — 82540EPDatasheet 23 4.5.1.2 PCI Bus Interface TimingNOTES:1. Output timing measurements are as shown.2. REQ# and GNT# signals are

Page 23 - 4.1 Absolute Maximum Ratings

Datasheet iiiNetworking Silicon — 82540EPRevision HistoryDate Revision NotesApr 2002 0.25 Initial ReleaseNov 2002 1.0 Changed document status to Intel

Page 24 - 4.3 DC Specifications

82540EP — Networking Silicon24 Datasheet Figure 4. PCI Bus Interface Input Timing Measurement ConditionsVTHVTLVTESTPCI_CLKTSUVTESTInput VMAXVTESTVTLV

Page 25 - Datasheet 19

Networking Silicon — 82540EPDatasheet 25 Figure 6. TVAL (max) Falling Edge Test Load10 pF25ΩPinTestPoint1/2 inch max.VCCFigure 7. TVAL (min) Test Lo

Page 26 - Table 8. I/O Characteristics

82540EP — Networking Silicon26 Datasheet 4.5.2 Link Interface Timing4.5.3 EEPROM Interfacea. The EEPROM clock is derived from a 125 MHz internal clock

Page 27 - 4.4 AC Characteristics

Networking Silicon — 82540EPDatasheet 27 5.0 Package and Pinout InformationThis section describes the 82540EP device, manufactured in a 196-lead ball

Page 28 - 4.5.1 PCI Bus Interface

82540EP — Networking Silicon28 Datasheet 5.2 Package InformationThe 82540EP device is a 196-lead ball grid array (TFBGA) measuring 15 mm2. The package

Page 29 - Datasheet 23

Networking Silicon — 82540EPDatasheet 29 5.3 Thermal SpecificationsThe 82540EP device is specified for operation when the ambient temperature (TA) is

Page 30

82540EP — Networking Silicon30 Datasheet 5.4 Pinout InformationTable 19. PCI Address, Data, and Control SignalsSignal Pin Signal Pin Signal PinPCI_AD

Page 31 - Datasheet 25

Networking Silicon — 82540EPDatasheet 31 Table 24. Power Management SignalsSignal Pin Signal PinLAN_PWR_GOODA9 AUX_PWR J12PME# A6 CLKRUN# C8Table 25.

Page 32 - 4.5.3 EEPROM Interface

82540EP — Networking Silicon32 Datasheet Table 31. PHY SignalsSignal Pin Signal Pin Signal PinXTAL1 K14 MDI0+ C13 MDI2+ F13XTAL2 J14 MDI1- E14 MDI3-

Page 33 - Tnnnnnnnn

Networking Silicon — 82540EPDatasheet 33 Table 35. Grounds and No Connect SignalsSignal Pin Signal Pin Signal Pin Signal PinGND B3 GND E7 GND G9 NC A

Page 34 - 5.2 Package Information

82540EP — Networking Siliconiv DatasheetNote: This page is intentionally left blank.

Page 35 - 5.3 Thermal Specifications

82540EP — Networking Silicon34 Datasheet PCI_AD[26] B5PCI_AD[27] B6GND B7PCI_AD[31] B8RST# B9SMBALRT# B10LED2 / LINK100# B11LED3 / LINK1000# B12CTRL_2

Page 36 - 5.4 Pinout Information

Networking Silicon — 82540EPDatasheet 35 VDDO (3.3V) E1GND E2PCI_AD[17] E3GND E4GND E5GND E6GND E7GND E8GND E9GND E10DVDD (1.5V) E11DVDD (1.5V) E12MDI

Page 37 - Networking Silicon — 82540EP

82540EP — Networking Silicon36 Datasheet GND G11AVDDL (2.5 V) G12DVDD (1.5V) G13GND G14STOP# H1INTA# H2DEVSEL# H3ZN_COMP H4DVDD (1.5V) H5DVDD (1.5V) H

Page 38 - 82540EP — Networking Silicon

Networking Silicon — 82540EPDatasheet 37 DVDD (1.5V) K7DVDD (1.5V) K8DVDD (1.5V) K9DVDD (1.5V) K10DVDD (1.5V) K11GND K12VDDO (3.3V) K13XTAL1 K14PCI_AD

Page 39

82540EP — Networking Silicon38 Datasheet PCI_AD[9] N3PCI_AD[7] N4PCI_AD[4] N5VDDO (3.3V) N6PCI_AD[0] N7VDDO (3.3V) N8FL_SCK N9EE_DO N10NC N11GND N12SD

Page 40

Networking Silicon — 82540EPDatasheet 39 5.5 Visual Pin ReferenceFigure 12. Ball Grid Array / Pin Reference for 196-TFBGA (thru-the-top view)•ABCDE FG

Page 41

Datasheet vNetworking Silicon — 82540EPContents1.0 Introduction...

Page 42

82540EP — Networking Siliconvi Datasheet4.5.3 EEPROM Interface...265.0 P

Page 43

Networking Silicon — 82540EPDatasheet 1 1.0 IntroductionThe Intel® 82540EP Gigabit Ethernet Controller is a single, compact component with an integrat

Page 44

82540EP — Networking Silicon2 DatasheetFigure 1. Gigabit Ethernet Controller Block DiagramTxArbPCIi/fPCI I/FRX MACTX MACTXdescriptorengineData Alignm

Page 45

Networking Silicon — 82540EPDatasheet 3 1.1 Document ScopeThis document contains datasheet specifications for the 82540EP Gigabit Ethernet Controller,

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